167 lines
3.2 KiB
C
167 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board specific initialization for AM642 EVM
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*
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* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
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* Keerthy <j-keerthy@ti.com>
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*
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <env.h>
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#include <net.h>
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#include <dm/uclass.h>
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#include <k3-ddrss.h>
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#include <spl.h>
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#include <fdt_support.h>
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#include <asm/gpio.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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s32 ret;
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ret = fdtdec_setup_mem_size_base();
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if (ret)
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printf("Error setting up mem size and base. %d\n", ret);
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return ret;
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}
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int dram_init_banksize(void)
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{
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s32 ret;
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ret = fdtdec_setup_memory_banksize();
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if (ret)
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printf("Error setting up memory banksize. %d\n", ret);
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return ret;
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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return 0;
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}
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#endif
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#if defined(CONFIG_SPL_BUILD)
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#if CONFIG_IS_ENABLED(USB_STORAGE)
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static int fixup_usb_boot(const void *fdt_blob)
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{
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int ret = 0;
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switch (spl_boot_device()) {
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case BOOT_DEVICE_USB:
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/*
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* If the boot mode is host, fixup the dr_mode to host
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* before cdns3 bind takes place
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*/
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ret = fdt_find_and_setprop((void *)fdt_blob,
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"/bus@f4000/cdns-usb@f900000/usb@f400000",
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"dr_mode", "host", 5, 0);
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if (ret)
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printf("%s: fdt_find_and_setprop() failed:%d\n",
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__func__, ret);
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fallthrough;
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default:
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break;
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}
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return ret;
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}
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#endif
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#if defined(CONFIG_K3_AM64_DDRSS)
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static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
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{
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struct udevice *dev;
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int ret;
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dram_init_banksize();
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret)
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panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
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ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
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if (ret)
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printf("Error fixing up ddr node for ECC use! %d\n", ret);
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}
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#else
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static void fixup_memory_node(struct spl_image_info *spl_image)
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{
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u64 start[CONFIG_NR_DRAM_BANKS];
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u64 size[CONFIG_NR_DRAM_BANKS];
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int bank;
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int ret;
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dram_init();
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dram_init_banksize();
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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start[bank] = gd->bd->bi_dram[bank].start;
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size[bank] = gd->bd->bi_dram[bank].size;
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}
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/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
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ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS);
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if (ret)
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printf("Error fixing up memory node! %d\n", ret);
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}
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#endif
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void spl_perform_fixups(struct spl_image_info *spl_image)
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{
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#if defined(CONFIG_K3_AM64_DDRSS)
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fixup_ddr_driver_for_ecc(spl_image);
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#else
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fixup_memory_node(spl_image);
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#endif
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#if CONFIG_IS_ENABLED(USB_STORAGE)
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fixup_usb_boot(spl_image->fdt_addr);
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#endif
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}
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#endif
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int checkboard(void)
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{
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printf("Board: GEMINI rev 1\n");
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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return 0;
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}
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#endif
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#define CTRLMMR_USB0_PHY_CTRL 0x43004008
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#define CORE_VOLTAGE 0x80000000
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#ifdef CONFIG_SPL_BOARD_INIT
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void spl_board_init(void)
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{
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u32 val;
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/* Set USB PHY core voltage to 0.85V */
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val = readl(CTRLMMR_USB0_PHY_CTRL);
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val &= ~(CORE_VOLTAGE);
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writel(val, CTRLMMR_USB0_PHY_CTRL);
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/* Init DRAM size for R5/A53 SPL */
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dram_init_banksize();
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}
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#endif
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