u-boot/board/nm/nrhw20/board.c

/*
 * board.c
 *
 * Board functions for Netmodule NRHW 20, based on AM335x EVB
 *
 * Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <errno.h>
#include <spl.h>
#include <serial.h>
#include <asm/arch/cpu.h>
#include <asm/arch/hardware.h>
#include <asm/arch/omap.h>
#include <asm/arch/ddr_defs.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk_synthesizer.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mem.h>
#include <asm/io.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <i2c.h>
#include <pca953x.h>
#include <miiphy.h>
#include <cpsw.h>
#include <environment.h>
#include <watchdog.h>

#include "../common/bdparser.h"
#include "../common/board_descriptor.h"
#include "board.h"
#include "shield.h"
#include "shield_can.h"
#include "shield_comio.h"
#include "fileaccess.h"

DECLARE_GLOBAL_DATA_PTR;


/*
 * CPU GPIOs
 *
 * GPIO0_2: RST_GNSS~
 * GPIO0_3: GEOFENCE_GNSS
 * GPIO0_4: RTK_STAT_GNSS
 * GPIO0_5: EXTINT_GNSS
 * GPIO0_6: TIMEPULSE_GNSS
 *
 * GPIO0_16: RST_PHY~
 * GPIO0_17: PMIC FAULT
 * GPIO0_27: RST_SHIELD~
 * GPIO0_31: GSM_WAKE
 *
 * GPIO1_14: DIG_OUT
 * GPIO1_15: DIG_IN
 * GPIO1_20: BT_EN
 * GPIO1_21: GSM_PWR_EN
 * GPIO1_25: RST_GSM
 * GPIO1_26: WLAN_EN
 * GPIO1_27: WLAN_IRQ
 *
 * GPIO3_0: BUTTON
 * GPIO3_4: PCIe_IO.WAKE
 * GPIO3_9: PCIe_IO.W_DIS
 * GPIO3_10: PCIe_IO.RST
 * GPIO3_17: SIM_SEL
 * GPIO3_21: RST_HUB~ (USB)
 */

#define GPIO_TO_PIN(bank, gpio)		(32 * (bank) + (gpio))

#define NETBIRD_GPIO_RESET_BUTTON	GPIO_TO_PIN(3, 0) /* TODO: From PMIC */

#define NETBIRD_GPIO_RST_PHY_N		GPIO_TO_PIN(0, 16)
#define NETBIRD_GPIO_RST_USB_HUB_N	GPIO_TO_PIN(3, 21)

#define NETBIRD_GPIO_RST_GNSS		GPIO_TO_PIN(0, 2)
#define NETBIRD_GPIO_RST_PCI		GPIO_TO_PIN(3, 10)

#define NETBIRD_GPIO_RST_GSM		GPIO_TO_PIN(1, 25)
#define NETBIRD_GPIO_PWR_GSM		GPIO_TO_PIN(1, 21)
#define NETBIRD_GPIO_WAKE_GSM		GPIO_TO_PIN(0, 31)
#define NETBIRD_GPIO_SIM_SEL		GPIO_TO_PIN(3, 17)

#define NETBIRD_GPIO_WLAN_EN		GPIO_TO_PIN(1, 26)
#define NETBIRD_GPIO_BT_EN		GPIO_TO_PIN(1, 20)

#define NETBIRD_GPIO_DIG_OUT		GPIO_TO_PIN(1, 14)
#define NETBIRD_GPIO_DIG_IN		GPIO_TO_PIN(1, 15)

/*
 * PMIC GPIOs
 *
 * GPIO_7: EN_SUPPLY_GSM
 * GPIO_8: VOLTAGE_SEL_PCIe
 * GPIO_9: EN_SUPPLY_PCIe
 * GPIO_10: LED0.RD~
 * GPIO_11: LED0.GN~
 */

#define PMIC_GSM_SUPPLY_EN_IO		7
#define PMIC_PCIe_SUPPLY_VSEL_IO	8
#define PMIC_PCIe_SUPPLY_EN_IO		9
#define PMIC_LED0_RED			10
#define PMIC_LED0_GREEN			11


/*
 * I2C IO Extender
 *
 * GPIO_0: LED0, Red
 * GPIO_1: LED0, Green
 * ..
 * GPIO_8: LED4, Red
 * GPIO_9: LED4, Green
 */

#define IOEXT_LED0_RED_MASK		(1U << 0)
#define IOEXT_LED0_GREEN_MASK		(1U << 1)
#define IOEXT_LED1_RED_MASK		(1U << 2)
#define IOEXT_LED1_GREEN_MASK		(1U << 3)
#define IOEXT_LED2_RED_MASK		(1U << 4)
#define IOEXT_LED2_GREEN_MASK		(1U << 5)
#define IOEXT_LED3_RED_MASK		(1U << 6)
#define IOEXT_LED3_GREEN_MASK		(1U << 7)
#define IOEXT_LED4_RED_MASK		(1U << 8)
#define IOEXT_LED4_GREEN_MASK		(1U << 9)
#define IOEXT_LEDS_ALL_MASK		(0x03FF)



#define DDR3_CLOCK_FREQUENCY		(400)

#if defined(CONFIG_SPL_BUILD) || \
	(defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
#endif


#define I2C_BD_EEPROM_BUS		(2)
#define BD_EEPROM_ADDR			(0x50)	  /* CPU BD EEPROM (8kByte) is at 50 (A0) */
#define BD_ADDRESS			(0x0000)  /* Board descriptor at beginning of EEPROM */
#define PD_ADDRESS			(0x0200)  /* Product descriptor */
#define PARTITION_ADDRESS		(0x0600)  /* Partition Table */

#define SHIELD_COM_IO	0
#define SHIELD_DUALCAN	1


static BD_Context   bdctx[3];		/* The descriptor contexts */

static int _bd_init(void)
{
	int old_bus;

	old_bus = i2c_get_bus_num();
	i2c_set_bus_num(I2C_BD_EEPROM_BUS);

	if (bd_get_context(&bdctx[0], BD_EEPROM_ADDR, BD_ADDRESS) != 0) {
		printf("%s() no valid bd found\n", __func__);
		return -1;
	}

	if (bd_get_context(&bdctx[1], BD_EEPROM_ADDR, PD_ADDRESS) != 0) {
		printf("%s() no valid pd found (legacy support)\n", __func__);
		return -1;
	}

	/* TODO: Can we get rid of this and use eMMC partitino table solely? */
	if (bd_get_context(&bdctx[2], BD_EEPROM_ADDR, PARTITION_ADDRESS) != 0) {
		printf("%s() no valid partition table found\n", __func__);
		/* TODO: error handling */
	}

	bd_register_context_list(bdctx, ARRAY_SIZE(bdctx));

	i2c_set_bus_num(old_bus);

	return 0;
}


static void init_indicator_leds(void)
{
	int old_bus;

	old_bus = i2c_get_bus_num();
	i2c_set_bus_num(CONFIG_SYS_I2C_PCA953X_BUS);

	/* Set all IOs as output */
	(void)pca953x_set_dir(CONFIG_SYS_I2C_PCA953X_ADDR, IOEXT_LEDS_ALL_MASK, PCA953X_DIR_OUT);

	/* Set all LEDs off */
	(void)pca953x_set_val(CONFIG_SYS_I2C_PCA953X_ADDR, IOEXT_LEDS_ALL_MASK, IOEXT_LEDS_ALL_MASK);

	i2c_set_bus_num(old_bus);
}

static void set_indicator(unsigned led, int red, int green)
{
	int old_bus;
	uint led_red_mask = 0x1U << (2*led);
	uint led_green_mask = 0x2U << (2*led);
	uint led_val = 0;

	old_bus = i2c_get_bus_num();
	i2c_set_bus_num(CONFIG_SYS_I2C_PCA953X_BUS);

	if (!red)
		led_val |= led_red_mask;

	if (!green)
		led_val |= led_green_mask;

	(void)pca953x_set_val(CONFIG_SYS_I2C_PCA953X_ADDR, led_red_mask | led_green_mask, led_val);

	i2c_set_bus_num(old_bus);
}


/*
 * Read header information from EEPROM into global structure.
 */
static inline int __maybe_unused read_eeprom(void)
{
	return _bd_init();
}

/* Selects console for SPL.
 * U-Boot console is defined by CONFIG_CONS_INDEX (via menuconfig)
 */
struct serial_device *default_serial_console(void)
{
	if (spl_boot_device() == BOOT_DEVICE_UART) {
		enable_uart0_pin_mux();
		return &eserial1_device;
	}
	else {
		/* TODO: Check */
		/* return &eserial1_device; */
		enable_uart1_pin_mux();
		return &eserial2_device;
    }
}

#ifndef CONFIG_SKIP_LOWLEVEL_INIT

static const struct ddr_data ddr3_netbird_data = {
	/* Ratios were optimized by DDR3 training software from TI */
	.datardsratio0 = 0x39,
	.datawdsratio0 = 0x3f,
	.datafwsratio0 = 0x98,
	.datawrsratio0 = 0x7d,
};

static const struct cmd_control ddr3_netbird_cmd_ctrl_data = {
	.cmd0csratio = MT41K256M16HA125E_RATIO,
	.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,

	.cmd1csratio = MT41K256M16HA125E_RATIO,
	.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,

	.cmd2csratio = MT41K256M16HA125E_RATIO,
	.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
};

static struct emif_regs ddr3_emif_reg_data = {
	.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
	.ref_ctrl = 0x61A,	/* 32ms > 85°C */
	.sdram_tim1 = 0x0AAAE51B,
	.sdram_tim2 = 0x246B7FDA,
	.sdram_tim3 = 0x50FFE67F,
	.zq_config = MT41K256M16HA125E_ZQ_CFG,
	.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
};


#define OSC	(V_OSCK/1000000)

struct dpll_params dpll_ddr_nrhw20 = {
	DDR3_CLOCK_FREQUENCY, OSC-1, 1, -1, -1, -1, -1
};


void am33xx_spl_board_init(void)
{
	/* TODO: Remove one of the two opp100 settings */

	/* Get the frequency */
	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);

	/* Set CPU speed to 600 MHZ */
	dpll_mpu_opp100.m = MPUPLL_M_600;

	/* Set CORE Frequencies to OPP100 (600MHz) */
	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);

	/* TODO: Modify PMIC settings if required */
	init_indicator_leds();
	set_indicator(0, 1, 1); /* Orange */

	/* Set MPU Frequency to what we detected now that voltages are set */
	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);

	/* TODO: Should not be needed in SPL */
/*
	if (read_eeprom() < 0)
		puts("Could not get board ID.\n");
*/
}

const struct dpll_params *get_dpll_ddr_params(void)
{
	dpll_ddr_nrhw20.n = (get_osclk() / 1000000) - 1;
	return &dpll_ddr_nrhw20;
}

void set_uart_mux_conf(void)
{
	enable_uart0_pin_mux();
	enable_uart1_pin_mux();
	/* TODO: ?? */
	/* disable_uart0_pin_mux(); */
	/* enable_uart1_pin_mux(); */
}

void set_mux_conf_regs(void)
{
	enable_board_pin_mux();
}


const struct ctrl_ioregs ioregs_netbird = {
	.cm0ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
	.cm1ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
	.cm2ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
	.dt0ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
	.dt1ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
};


void sdram_init(void)
{
	config_ddr(DDR3_CLOCK_FREQUENCY, &ioregs_netbird,
		   &ddr3_netbird_data,
		   &ddr3_netbird_cmd_ctrl_data,
		   &ddr3_emif_reg_data, 0);
}

#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

static void request_and_set_gpio(int gpio, const char *name, int value)
{
	int ret;

	ret = gpio_request(gpio, name);
	if (ret < 0) {
		printf("%s: Unable to request %s\n", __func__, name);
		return;
	}

	/* TODO: Set value here, remove later call gpio_set_value */
	ret = gpio_direction_output(gpio, 0);
	if (ret < 0) {
		printf("%s: Unable to set %s as output\n", __func__, name);
		goto err_free_gpio;
	}

	gpio_set_value(gpio, value);

	return;

err_free_gpio:
	gpio_free(gpio);
}

#define REQUEST_AND_SET_GPIO(N)		request_and_set_gpio(N, #N, 1);
#define REQUEST_AND_CLEAR_GPIO(N)	request_and_set_gpio(N, #N, 0);

#if 0 /* TODO: Remove if not required */
static void request_input_gpio(int gpio, const char *name, int value)
{
	int ret;

	ret = gpio_request(gpio, name);
	if (ret < 0) {
		printf("%s: Unable to request %s\n", __func__, name);
		return;
	}

	ret = gpio_direction_input(gpio);
	if (ret < 0) {
		printf("%s: Unable to set %s as input\n", __func__, name);
		goto err_free_gpio;
	}

	return;

err_free_gpio:
	gpio_free(gpio);
}

#define REQUEST_INPUT_GPIO(N)		request_input_gpio(N, #N, 0);
#endif


#if !defined(CONFIG_SPL_BUILD)

/* TODO: Redesign to use PMIC input */
static int check_reset_button(void)
{
#if 0
	int counter = 0;
	int ret;

	ret = gpio_request(NETBIRD_GPIO_RESET_BUTTON, "reset button");
	if (ret < 0) {
		printf("Unable to request reset button gpio\n");
		return -1;
	}

	ret = gpio_direction_input(NETBIRD_GPIO_RESET_BUTTON);
	if (ret < 0) {
		printf("Unable to set reset button as input\n");
		return -1;
	}

	/* Check if reset button is pressed for at least 2 seconds ≃ ~5s */
	do {
		if (gpio_get_value(NETBIRD_GPIO_RESET_BUTTON) != 0)  break;
		udelay(100000);  /* 100ms */
		counter++;

		if (counter==20) {/* Indicate factory reset threshold */
			gpio_set_value(NETBIRD_GPIO_LED_A, 0);
			gpio_set_value(NETBIRD_GPIO_LED_B, 0);
			udelay(400000);  /* 400ms */
			/* let LED blink up once */
			gpio_set_value(NETBIRD_GPIO_LED_A, 1);
			gpio_set_value(NETBIRD_GPIO_LED_B, 1);
			udelay(400000);  /* 400ms */
			gpio_set_value(NETBIRD_GPIO_LED_A, 0);
			gpio_set_value(NETBIRD_GPIO_LED_B, 0);
		} else if (counter==120) { /* Indicate recovery boot threshold */
			/* let LED blink up twice */
			gpio_set_value(NETBIRD_GPIO_LED_A, 1);
			gpio_set_value(NETBIRD_GPIO_LED_B, 1);
			udelay(400000);  /* 400ms */
			gpio_set_value(NETBIRD_GPIO_LED_A, 0);
			gpio_set_value(NETBIRD_GPIO_LED_B, 0);
			udelay(400000);  /* 400ms */
			gpio_set_value(NETBIRD_GPIO_LED_A, 1);
			gpio_set_value(NETBIRD_GPIO_LED_B, 1);
			udelay(400000);  /* 400ms */
			gpio_set_value(NETBIRD_GPIO_LED_A, 0);
			gpio_set_value(NETBIRD_GPIO_LED_B, 0);
		}
	} while (counter<120);

	if (counter < 20) return 0; /* Don't do anything for duration < 2s */

	if (counter < 120) /* Do factory reset for duration between ~5s and ~15s */
	{
		char new_bootargs[512];
		char *bootargs = getenv("bootargs");

		if (bootargs==0) bootargs="";

		printf("Do factory reset during boot...\n");

		strncpy(new_bootargs, bootargs, sizeof(new_bootargs));
		strncat(new_bootargs, " factory-reset", sizeof(new_bootargs));

		setenv("bootargs", new_bootargs);

		printf("bootargs = %s\n", new_bootargs);

		return 1;
	} else {	/* Boot into recovery for duration > 15s */
		/* set consoledev to external port */
		setenv("consoledev", "ttyS1");

		printf("Booting recovery image...\n");

		/* Set bootcmd to run recovery */
		setenv("bootcmd", "run recovery");

		return 0;
	}
	return 0;
#else
	return 0;
#endif
}
#endif


/* TODO: Create DA9063 Accessor Module */
#define CONFIG_PMIC_I2C_BUS	0
#define CONFIG_PMIC_I2C_ADDR	0x58	/* Pages 0 and 1, Pages 2 and 3 -> 0x59 */

#define PMIC_REG_GPIO_MODE0_7	0x1D	/* Control register for GPIOs 0..7 */
#define PMIC_REG_GPIO_MODE8_15	0x1E	/* Control register for GPIOs 8..15 */

#define PMIC_REG_BBAT_CONT	0xC5	/* Control register for backup battery */


static int da9063_i2c_bus = 0;

void da9063_init(int i2c_bus)
{
	da9063_i2c_bus = i2c_bus;
}

int da9093_get_reg(int reg, u8* val)
{
	int ret;
	int old_bus;
	u8 temp;

	/* TODO: Check whether switching is required */
	old_bus = i2c_get_bus_num();
	i2c_set_bus_num(da9063_i2c_bus);

	/* TODO: Use CONFIG_PMIC_I2C_ADDR+1 if reg > 0xFF */
	*val = 0;
	ret = i2c_read(CONFIG_PMIC_I2C_ADDR, reg, 1, &temp, 1);
	if (ret == 0)
		*val = temp;

	i2c_set_bus_num(old_bus);

	return ret;
}

int da9093_set_reg(int reg, u8 val)
{
	int ret;
	int old_bus;

	/* TODO: Check whether switching is required */
	old_bus = i2c_get_bus_num();
	i2c_set_bus_num(da9063_i2c_bus);

	/* TODO: Use CONFIG_PMIC_I2C_ADDR+1 if reg > 0xFF */
	ret = i2c_write(CONFIG_PMIC_I2C_ADDR, reg, 1, &val, 1);
	if (ret != 0)
		puts("da9063 write error\n");

	i2c_set_bus_num(old_bus);

	return ret;
}

void da9063_set_gpio(unsigned bit, int state)
{
	int pmic_reg;
	int ret;
	u8 bitmask;
	u8 reg = 0x00;

	if (bit <= 7) {
		pmic_reg = PMIC_REG_GPIO_MODE0_7;
		bitmask = 1U << (bit-0);
	}
	else  {
		pmic_reg = PMIC_REG_GPIO_MODE8_15;
		bitmask = 1U << (bit-8);
	}

/*	printf("da9063_set_gpio %d 0x%04x\n", pmic_reg, bitmask); */
	ret = da9093_get_reg(pmic_reg, &reg);

	if (ret == 0)  {
		if (state)	reg |=  bitmask;
		else		reg &= ~bitmask;

		(void)da9093_set_reg(pmic_reg, reg);
	}
}


static void set_status_led(int red, int green)
{
	/* LED outputs are active low, invert state */
	da9063_set_gpio(PMIC_LED0_RED, !red);
	da9063_set_gpio(PMIC_LED0_GREEN, !green);
}



/*
 * Basic board specific setup. Pinmux has been handled already.
 * Not called in SPL build.
 */
int board_init(void)
{
#if defined(CONFIG_HW_WATCHDOG)
	hw_watchdog_init();
#endif

	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

	/* Configure both I2C buses used in NRHW20 */
	i2c_set_bus_num(0);
	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
	i2c_set_bus_num(2);
	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
	i2c_set_bus_num(0);

	da9063_init(CONFIG_PMIC_I2C_BUS);
	init_indicator_leds();

	set_status_led(1, 1);	/* Orange */
	set_indicator(0, 0, 1); /* Green */
	set_indicator(1, 0, 1); /* Green */

	/* Keep unused subsystems in reset */
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_WLAN_EN);
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_BT_EN);
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_GNSS);
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_PCI);
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_DIG_OUT);

	da9063_set_gpio(PMIC_PCIe_SUPPLY_EN_IO, 0);	/* PCIe Supply off */
	da9063_set_gpio(PMIC_PCIe_SUPPLY_VSEL_IO, 0);	/* PCIe voltage = 3.3V */

	/* Enable charging of RTC backup capacitor (1mA, 3.1V) */
	(void)da9093_set_reg(PMIC_REG_BBAT_CONT, 0xCF);

	/* Enable Ethernet switch */
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_PHY_N);
	mdelay(1);
	/* OMAP3 does not feature open drain pins, thus configure pin as input */
	gpio_direction_input(NETBIRD_GPIO_RST_PHY_N);
	/* When the Ethernet switch senses reset, it drives reset for 8..14ms
	 * Wait longer than this time to avoid IO congestion later on.
	 */
	mdelay(20);

	/* Enable USB hub */
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_USB_HUB_N);
	/* Minimum Reset Pulse = 1us */
	mdelay(2);
	gpio_set_value(NETBIRD_GPIO_RST_USB_HUB_N, 1);

	/* Disable GSM supply, and make sure reset is set once */
	da9063_set_gpio(PMIC_GSM_SUPPLY_EN_IO, 0);
	REQUEST_AND_SET_GPIO(NETBIRD_GPIO_RST_GSM);
	REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_PWR_GSM);
	mdelay(20);

	/* Enable GSM supply */
	da9063_set_gpio(PMIC_GSM_SUPPLY_EN_IO, 1);
	mdelay(20);

	/* Take modem out of reset, we have to wait 300ms afterwards */
	gpio_set_value(NETBIRD_GPIO_RST_GSM, 0);
	mdelay(300);

	/* Do power up sequence, this modem has a special power up sequence
	 * where we have to pull PWR for > 1s but < 7s (see manual)
	 */
	gpio_set_value(NETBIRD_GPIO_PWR_GSM, 1);

	/* TODO: Defer to late_init, so that we don't block boot */
	mdelay(1200);
	gpio_set_value(NETBIRD_GPIO_PWR_GSM, 0);

	printf("OSC:   %lu MHz\n", get_osclk()/1000000);

	return 0;
}

#if !defined(CONFIG_SPL_BUILD)

void set_console(void)
{
	char buf[8];
	const char *defaultconsole = getenv("defaultconsole");
	int shield_id = bd_get_shield(0);

	if (defaultconsole == 0) {
		/* Use the default console */
		setenv("defaultconsole", "ttyS1");
	}

	/* Don't allow changing to ttyS0 because ttyS0 is not available in the
	 * kernel if no comio shield is available */
	if (shield_id != SHIELD_COM_IO) {
		return;
	}

	/* With comio shield the defaultconsole should be ttyS0 and not ttyS1 */
	setenv("defaultconsole", "ttyS0");

	/* If consoldev is set take this as productive console instead of default console */
	if (read_file("/root/boot/consoledev", buf, 5) != 5) {
		puts("Invalid file consoledev\n");
		return;
	}

	if (strstr(buf, "tty")==buf) {
		buf[5] = 0;
		setenv("defaultconsole", buf);
	}
}

static void set_devicetree_name(void)
{
	char devicetreename[64];

	/* add hardware versions to environment */
	if (bd_get_devicetree(devicetreename, sizeof(devicetreename)) != 0) {
		printf("Devicetree name not found, using default name\n");
		strcpy(devicetreename, "am335x-nrhw20-prod1.dtb");
	}

	setenv("fdt_image", devicetreename);
}

static void get_hw_version(void)
{
	int hw_ver, hw_rev;
	char hw_versions[16];
	char new_env[256];	/* current bootargs = 84 bytes */

	bd_get_hw_version(&hw_ver, &hw_rev);
	printf("HW20:  V%d.%d\n", hw_ver, hw_rev);

	/* add hardware versions to environment */
	snprintf(hw_versions, sizeof(hw_versions), "CP=%d.%d", hw_ver, hw_rev);
	snprintf(new_env, sizeof(new_env), "setenv bootargs $bootargs %s", hw_versions);
	setenv("add_version_bootargs", new_env);
}

static void check_fct(void)
{
	/* Check whether an I2C device (EEPROM) is present at address 0xA2/0x51
	 * In this case we are connected to the factory test station.
	 * Clear the bootcmd, so that test system can easily connect.
	 */

	int old_bus;

	old_bus = i2c_get_bus_num();
	i2c_set_bus_num(I2C_BD_EEPROM_BUS);

	/* If probe fails we are sure no eeprom is connected */
	if (i2c_probe(0x51) == 0) {
		printf("Entering fct mode\n");
		setenv ("bootcmd", "");
	}

	i2c_set_bus_num(old_bus);
}


static void set_fdtshieldcmd(const char *fdt_cmd)
{
	setenv("fdtshieldcmd", fdt_cmd);
}

struct shield_command {
	int shield_id;
	const char *name;
	const char *default_shieldcmd;
	const char *fdtshieldcmd;
	void (*init)(void);
};

static struct shield_command known_shield_commands[] = {
	{
		SHIELD_COM_IO,
		"comio",
		"shield comio mode rs232",
		"fdt get value serial0 /aliases serial0;" \
		"fdt set $serial0 status okay",
		comio_shield_init
	},
	{
		SHIELD_DUALCAN,
		"dualcan",
		"shield dualcan termination off off",
		"fdt get value can0 /aliases d_can0;" \
		"fdt get value can1 /aliases d_can1;" \
		"fdt set $can0 status okay;" \
		"fdt set $can1 status okay;",
		can_shield_init
	},
};

static const struct shield_command* get_shield_command(int shield_id)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(known_shield_commands); i++) {
		if (known_shield_commands[i].shield_id == shield_id) {
			return &known_shield_commands[i];
		}
	}

	return NULL;
}

static void shield_config(void)
{
#define MAX_SHIELD_CMD_LEN 128

	char shieldcmd_linux[MAX_SHIELD_CMD_LEN];
	const char *shieldcmd;
	const struct shield_command *cmd;
	int len;

	int shield_id = bd_get_shield(0);
	if (shield_id < 0) {
		debug("No shield found in bd\n");
		return;
	}

	cmd = get_shield_command(shield_id);
	if (cmd == NULL) {
		printf ("Unknown shield id %d\n", shield_id);
		return;
	}

	printf("Shield: %s\n", cmd->name);

	cmd->init();
	shieldcmd = cmd->default_shieldcmd;

	/* If a shield configuration is set by Linux, take it without bd check.
	 * We asume that Linux knows what to do.
	 */
	len = read_file("/root/boot/shieldcmd", shieldcmd_linux, MAX_SHIELD_CMD_LEN);
	if (len > 0) {
		debug("Shield command found in file, using it\n");
		shieldcmd = shieldcmd_linux;
	}

	setenv("shieldcmd", shieldcmd);

	set_fdtshieldcmd(cmd->fdtshieldcmd);
}

static void shield_init(void)
{
	shield_config();
}
#endif

int board_late_init(void)
{
#if !defined(CONFIG_SPL_BUILD)
	int boot_partition;

	if (read_eeprom() < 0)
		puts("Could not get board ID.\n");

	/* add active root partition to environment */
	boot_partition = bd_get_boot_partition();
	if (boot_partition > 1) {
		boot_partition = 0;
	}

	/* mmcblk0p1 => root0, mmcblk0p2 => root1 so +1 */
	setenv_ulong("root_part", boot_partition + 1);

	check_reset_button();

	get_hw_version();

	set_devicetree_name();

	/* TODO: Later */
	/* set_console(); */

	set_status_led(0, 1);	/* Green */

	shield_init();

	check_fct();
#endif

	return 0;
}

#ifndef CONFIG_DM_ETH

#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
	/* VTP can be added here */

	return;
}

static struct cpsw_slave_data cpsw_slaves[] = {
	{
		.slave_reg_ofs	= 0x208,
		.sliver_reg_ofs	= 0xd80,
		.phy_if		= PHY_INTERFACE_MODE_RMII,
		.phy_addr	= 0
	}
};

static struct cpsw_platform_data cpsw_data = {
	.mdio_base		= CPSW_MDIO_BASE,
	.cpsw_base		= CPSW_BASE,
	.mdio_div		= 0xff,
	.channels		= 8,
	.cpdma_reg_ofs		= 0x800,
	.slaves			= 1,
	.slave_data		= cpsw_slaves,
	.ale_reg_ofs		= 0xd00,
	.ale_entries		= 1024,
	.host_port_reg_ofs	= 0x108,
	.hw_stats_reg_ofs	= 0x900,
	.bd_ram_ofs		= 0x2000,
	.mac_control		= (1 << 5),
	.control		= cpsw_control,
	.host_port_num		= 0,
	.version		= CPSW_CTRL_VERSION_2,
};
#endif

#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) &&\
	defined(CONFIG_SPL_BUILD)) || \
	((defined(CONFIG_DRIVER_TI_CPSW) || \
	  defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
	 !defined(CONFIG_SPL_BUILD))

static void set_mac_address(int index, uchar mac[6])
{
	/* Then take mac from bd */
	if (is_valid_ethaddr(mac)) {
		eth_setenv_enetaddr_by_index("eth", index, mac);
	}
	else {
		printf("Trying to set invalid MAC address");
	}
}

/* TODO: Update doc */
/*
 * This function will:
 * Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr
 * in the environment
 * Perform fixups to the PHY present on certain boards.  We only need this
 * function in:
 * - SPL with either CPSW or USB ethernet support
 * - Full U-Boot, with either CPSW or USB ethernet
 * Build in only these cases to avoid warnings about unused variables
 * when we build an SPL that has neither option but full U-Boot will.
 */
int board_eth_init(bd_t *bis)
{
	int rv, n = 0;
	uint8_t mac_addr0[6] = {02,00,00,00,00,01};
	__maybe_unused struct ti_am_eeprom *header;

#if !defined(CONFIG_SPL_BUILD)
#ifdef CONFIG_DRIVER_TI_CPSW

	cpsw_data.mdio_div = 0x3E;

	bd_get_mac(0, mac_addr0, sizeof(mac_addr0));
	set_mac_address(0, mac_addr0);

	writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);

	rv = cpsw_register(&cpsw_data);
	if (rv < 0)
		printf("Error %d registering CPSW switch\n", rv);
	else
		n += rv;
#endif
#endif

#if defined(CONFIG_USB_ETHER) && \
	(!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
	if (is_valid_ethaddr(mac_addr0))
		eth_setenv_enetaddr("usbnet_devaddr", mac_addr0);

	rv = usb_eth_initialize(bis);
	if (rv < 0)
		printf("Error %d registering USB_ETHER\n", rv);
	else
		n += rv;
#endif
	return n;
}
#endif

#endif /* CONFIG_DM_ETH */

#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
	return 0;
}
#endif