Masahiro Yamada 105a9e705e ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macros ... Each way of the system cache has 256 entries for PH1-Pro4 and older SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line size is still 128 byte. Thus, the way size is 32KB/64KB for old/new SoCs. To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the constant value 32KB. It is large enough for temporary RAM and should work for all the SoCs of UniPhier family. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>		2015-03-01 00:03:21 +09:00
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arm-mpcore.h	…
bcu-regs.h	…
board.h	…
boot-device.h	…
ddrphy-regs.h	…
debug-uart.S	…
led.h	…
mio-regs.h	…
platdevice.h	ARM: UniPhier: remove EHCI platform devices	2015-03-01 00:02:48 +09:00
sbc-regs.h	…
sc-regs.h	ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initialization	2015-03-01 00:03:18 +09:00
sg-regs.h	ARM: UniPhier: consolidate MEMCONF setting code	2015-03-01 00:03:13 +09:00
ssc-regs.h	ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macros	2015-03-01 00:03:21 +09:00
umc-regs.h	…