125 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			125 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * Copyright (C) 2020 Microchip Technology Inc.
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 * Padmarao Begari <padmarao.begari@microchip.com>
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 */
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#include <common.h>
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#include <clk.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <log.h>
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#include <dm/device.h>
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#include <dm/devres.h>
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#include <dm/uclass.h>
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#include <linux/err.h>
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#include "mpfs_clk.h"
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/* All methods are delegated to CCF clocks */
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static ulong mpfs_clk_get_rate(struct clk *clk)
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{
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	struct clk *c;
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	int err = clk_get_by_id(clk->id, &c);
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	if (err)
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		return err;
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	return clk_get_rate(c);
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}
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static ulong mpfs_clk_set_rate(struct clk *clk, unsigned long rate)
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{
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	struct clk *c;
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	int err = clk_get_by_id(clk->id, &c);
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	if (err)
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		return err;
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	return clk_set_rate(c, rate);
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}
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static int mpfs_clk_set_parent(struct clk *clk, struct clk *parent)
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{
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	struct clk *c, *p;
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	int err = clk_get_by_id(clk->id, &c);
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	if (err)
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		return err;
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	err = clk_get_by_id(parent->id, &p);
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	if (err)
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		return err;
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	return clk_set_parent(c, p);
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}
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static int mpfs_clk_endisable(struct clk *clk, bool enable)
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{
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	struct clk *c;
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	int err = clk_get_by_id(clk->id, &c);
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	if (err)
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		return err;
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	return enable ? clk_enable(c) : clk_disable(c);
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}
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static int mpfs_clk_enable(struct clk *clk)
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{
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	return mpfs_clk_endisable(clk, true);
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}
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static int mpfs_clk_disable(struct clk *clk)
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{
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	return mpfs_clk_endisable(clk, false);
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}
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static int mpfs_clk_probe(struct udevice *dev)
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{
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	int ret;
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	void __iomem *base;
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	u32 clk_rate;
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	const char *parent_clk_name;
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	struct clk *clk = dev_get_priv(dev);
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	base = dev_read_addr_ptr(dev);
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	if (!base)
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		return -EINVAL;
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	ret = clk_get_by_index(dev, 0, clk);
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	if (ret)
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		return ret;
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	dev_read_u32(clk->dev, "clock-frequency", &clk_rate);
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	parent_clk_name = clk->dev->name;
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	ret = mpfs_clk_register_cfgs(base, clk_rate, parent_clk_name);
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	if (ret)
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		return ret;
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	ret = mpfs_clk_register_periphs(base, clk_rate, "clk_ahb");
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	return ret;
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}
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static const struct clk_ops mpfs_clk_ops = {
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	.set_rate = mpfs_clk_set_rate,
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	.get_rate = mpfs_clk_get_rate,
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	.set_parent = mpfs_clk_set_parent,
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	.enable = mpfs_clk_enable,
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	.disable = mpfs_clk_disable,
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};
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static const struct udevice_id mpfs_of_match[] = {
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	{ .compatible = "microchip,mpfs-clkcfg" },
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	{ }
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};
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U_BOOT_DRIVER(mpfs_clk) = {
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	.name = "mpfs_clk",
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	.id = UCLASS_CLK,
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	.of_match = mpfs_of_match,
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	.ops = &mpfs_clk_ops,
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	.probe = mpfs_clk_probe,
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	.priv_auto = sizeof(struct clk),
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	.flags = DM_FLAG_PRE_RELOC,
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};
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