120 lines
1.8 KiB
Plaintext
120 lines
1.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Device Tree Include file for Freescale Layerscape-1046A family SoC.
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*
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* Copyright 2016, Freescale Semiconductor
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* Copyright 2020 NXP
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*
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* Mingkai Hu <Mingkai.hu@freescale.com>
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*/
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/dts-v1/;
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/include/ "fsl-ls1046a.dtsi"
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/ {
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model = "LS1046A RDB Board";
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aliases {
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spi0 = &qspi;
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};
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};
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&qspi {
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status = "okay";
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s25fs512s0: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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s25fs512s1: flash@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <1>;
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};
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};
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&sata {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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#include "fsl-ls1046-post.dtsi"
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&fman0 {
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ethernet@e4000 {
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phy-handle = <&rgmii_phy1>;
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phy-connection-type = "rgmii-id";
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status = "okay";
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};
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ethernet@e6000 {
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phy-handle = <&rgmii_phy2>;
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phy-connection-type = "rgmii-id";
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status = "okay";
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};
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ethernet@e8000 {
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phy-handle = <&sgmii_phy1>;
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phy-connection-type = "sgmii";
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status = "okay";
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};
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ethernet@ea000 {
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phy-handle = <&sgmii_phy2>;
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phy-connection-type = "sgmii";
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status = "okay";
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};
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ethernet@f0000 { /* 10GEC1 */
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phy-handle = <&aqr106_phy>;
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phy-connection-type = "xgmii";
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status = "okay";
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};
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ethernet@f2000 { /* 10GEC2 */
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fixed-link = <0 1 1000 0 0>;
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phy-connection-type = "xgmii";
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status = "okay";
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};
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mdio@fc000 {
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rgmii_phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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rgmii_phy2: ethernet-phy@2 {
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reg = <0x2>;
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};
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sgmii_phy1: ethernet-phy@3 {
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reg = <0x3>;
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};
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sgmii_phy2: ethernet-phy@4 {
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reg = <0x4>;
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};
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};
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mdio@fd000 {
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aqr106_phy: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c45";
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interrupts = <0 131 4>;
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reg = <0x0>;
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};
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};
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};
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