425 lines
9.1 KiB
Plaintext
425 lines
9.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright 2018 Technexion Ltd.
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//
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// Author: Wig Cheng <wig.cheng@technexion.com>
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// Richard Hu <richard.hu@technexion.com>
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// Tapani Utriainen <tapani@technexion.com>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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aliases {
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mmc0 = &usdhc3;
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usb0 = &usbotg;
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};
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chosen {
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stdout-path = &uart1;
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};
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reg_2p5v: regulator-2p5v {
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compatible = "regulator-fixed";
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator-usb-otg-vbus {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg_vbus>;
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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cs-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie_reset>;
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reset-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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status = "okay";
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm2>;
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status = "okay";
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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status = "okay";
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};
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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status = "okay";
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};
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&ssi1 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 { /* Bluetooth module */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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dr_mode = "otg";
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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bus-width = <8>;
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cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&usdhc2 { /* Wifi/BT */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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bus-width = <4>;
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no-1-8-v;
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keep-power-in-suspend;
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non-removable;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <8>;
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no-1-8-v;
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non-removable;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x4001b0b5 /* PICO_P24 */
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MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x4001b0b5 /* PICO_P25 */
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MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x4001b0b5 /* PICO_P26 */
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MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b5 /* PICO_P28 */
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MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b0b5 /* PICO_P30 */
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MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b0b5 /* PICO_P32 */
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MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x4001b0b5 /* PICO_P34 */
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MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x4001b0b5 /* PICO_P42 */
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MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x4001b0b5 /* PICO_P44 */
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MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x4001b0b5 /* PICO_P48 */
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>;
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};
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000f0b0
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x1b0b1
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MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x1b0b1
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MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x1b0b1
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MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000f0b0
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MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x000f0b0
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
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MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
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MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1f0b1
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_pcie_reset: pciegrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x130b0
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>;
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};
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pinctrl_pwm1: pwm1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
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>;
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};
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pinctrl_pwm2: pwm2grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
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>;
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};
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pinctrl_pwm3: pwm3grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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>;
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};
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pinctrl_pwm4: pwm4grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
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MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
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>;
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};
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pinctrl_usbotg_vbus: usbotgvbusgrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x17071
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0xb0b1
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MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
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MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
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MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
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MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
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>;
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};
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};
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