251 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			251 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
| /*
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|  * Common device tree for IGEP boards based on AM/DM37x
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|  *
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|  * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
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|  * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| /dts-v1/;
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| 
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| #include "omap36xx.dtsi"
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| 
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| / {
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| 	memory@80000000 {
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| 		device_type = "memory";
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| 		reg = <0x80000000 0x20000000>; /* 512 MB */
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| 	};
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| 
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| 	chosen {
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| 		stdout-path = &uart3;
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| 	};
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| 
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| 	sound {
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| 		compatible = "ti,omap-twl4030";
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| 		ti,model = "igep2";
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| 		ti,mcbsp = <&mcbsp2>;
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| 	};
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| 
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| 	vdd33: regulator-vdd33 {
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| 		compatible = "regulator-fixed";
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| 		regulator-name = "vdd33";
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| 		regulator-always-on;
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| 	};
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| 
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| };
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| 
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| &omap3_pmx_core {
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| 	gpmc_pins: pinmux_gpmc_pins {
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| 		pinctrl-single,pins = <
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| 			/* OneNAND seems to require PIN_INPUT on clock. */
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|                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
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| 		>;
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| 	};
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| 
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| 	uart1_pins: pinmux_uart1_pins {
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| 		pinctrl-single,pins = <
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| 			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)	/* uart1_rx.uart1_rx */
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| 			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)	/* uart1_tx.uart1_tx */
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| 		>;
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| 	};
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| 
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| 	uart3_pins: pinmux_uart3_pins {
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| 		pinctrl-single,pins = <
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| 			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)	/* uart3_rx.uart3_rx */
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| 			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx.uart3_tx */
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| 		>;
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| 	};
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| 
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| 	mcbsp2_pins: pinmux_mcbsp2_pins {
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| 		pinctrl-single,pins = <
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| 			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_fsx */
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| 			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_clkx.mcbsp2_clkx */
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| 			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2.dr */
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| 			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dx.mcbsp2_dx */
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| 		>;
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| 	};
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| 
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| 	mmc1_pins: pinmux_mmc1_pins {
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| 		pinctrl-single,pins = <
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| 			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
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| 			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
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| 			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
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| 			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
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| 			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
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| 			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
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| 		>;
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| 	};
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| 
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| 	mmc2_pins: pinmux_mmc2_pins {
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| 		pinctrl-single,pins = <
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| 			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
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| 			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
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| 			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
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| 			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
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| 			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
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| 			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
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| 		>;
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| 	};
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| 
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| 	i2c1_pins: pinmux_i2c1_pins {
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| 		pinctrl-single,pins = <
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| 			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)	/* i2c1_scl.i2c1_scl */
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| 			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)	/* i2c1_sda.i2c1_sda */
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| 		>;
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| 	};
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| 
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| 	i2c3_pins: pinmux_i2c3_pins {
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| 		pinctrl-single,pins = <
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| 			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
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| 			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
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| 		>;
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| 	};
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| };
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| 
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| &gpmc {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&gpmc_pins>;
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| 
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| 	nand@0,0 {
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| 		compatible = "ti,omap2-nand";
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| 		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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| 		interrupt-parent = <&gpmc>;
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| 		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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| 			     <1 IRQ_TYPE_NONE>;	/* termcount */
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| 		linux,mtd-name= "micron,mt29c4g96maz";
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| 		nand-bus-width = <16>;
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| 		gpmc,device-width = <2>;
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| 		ti,nand-ecc-opt = "bch8";
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| 
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| 		gpmc,sync-clk-ps = <0>;
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| 		gpmc,cs-on-ns = <0>;
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| 		gpmc,cs-rd-off-ns = <44>;
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| 		gpmc,cs-wr-off-ns = <44>;
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| 		gpmc,adv-on-ns = <6>;
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| 		gpmc,adv-rd-off-ns = <34>;
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| 		gpmc,adv-wr-off-ns = <44>;
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| 		gpmc,we-off-ns = <40>;
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| 		gpmc,oe-off-ns = <54>;
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| 		gpmc,access-ns = <64>;
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| 		gpmc,rd-cycle-ns = <82>;
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| 		gpmc,wr-cycle-ns = <82>;
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| 		gpmc,wr-access-ns = <40>;
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| 		gpmc,wr-data-mux-bus-ns = <0>;
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| 
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 
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| 		status = "okay";
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| 	};
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| 
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| 	onenand@0,0 {
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| 		compatible = "ti,omap2-onenand";
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| 		reg = <0 0 0x20000>;	/* CS0, offset 0, IO size 128K */
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| 
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| 		gpmc,sync-read;
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| 		gpmc,sync-write;
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| 		gpmc,burst-length = <16>;
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| 		gpmc,burst-wrap;
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| 		gpmc,burst-read;
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| 		gpmc,burst-write;
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| 		gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
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| 		gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
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| 		gpmc,cs-on-ns = <0>;
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| 		gpmc,cs-rd-off-ns = <96>;
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| 		gpmc,cs-wr-off-ns = <96>;
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| 		gpmc,adv-on-ns = <0>;
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| 		gpmc,adv-rd-off-ns = <12>;
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| 		gpmc,adv-wr-off-ns = <12>;
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| 		gpmc,oe-on-ns = <18>;
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| 		gpmc,oe-off-ns = <96>;
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| 		gpmc,we-on-ns = <0>;
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| 		gpmc,we-off-ns = <96>;
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| 		gpmc,rd-cycle-ns = <114>;
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| 		gpmc,wr-cycle-ns = <114>;
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| 		gpmc,access-ns = <90>;
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| 		gpmc,page-burst-access-ns = <12>;
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| 		gpmc,bus-turnaround-ns = <0>;
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| 		gpmc,cycle2cycle-delay-ns = <0>;
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| 		gpmc,wait-monitoring-ns = <0>;
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| 		gpmc,clk-activation-ns = <6>;
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| 		gpmc,wr-data-mux-bus-ns = <30>;
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| 		gpmc,wr-access-ns = <90>;
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| 		gpmc,sync-clk-ps = <12000>;
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| 
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 
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| 		status = "disabled";
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| 	};
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| };
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| 
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| &i2c1 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&i2c1_pins>;
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| 	clock-frequency = <2600000>;
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| 
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| 	twl: twl@48 {
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| 		reg = <0x48>;
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| 		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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| 		interrupt-parent = <&intc>;
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| 
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| 		twl_audio: audio {
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| 			compatible = "ti,twl4030-audio";
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| 			codec {
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| 			};
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| 		};
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| 	};
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| };
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| 
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| #include "twl4030.dtsi"
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| #include "twl4030_omap3.dtsi"
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| 
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| &i2c3 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&i2c3_pins>;
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| };
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| 
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| &mcbsp2 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&mcbsp2_pins>;
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| 	status = "okay";
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| };
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| 
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| &mmc1 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&mmc1_pins>;
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| 	vmmc-supply = <&vmmc1>;
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| 	vmmc_aux-supply = <&vsim>;
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| 	bus-width = <4>;
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| 	cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
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| };
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| 
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| &mmc3 {
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| 	status = "disabled";
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| };
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| 
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| &uart1 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&uart1_pins>;
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| };
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| 
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| &uart3 {
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| 	pinctrl-names = "default";
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| 	pinctrl-0 = <&uart3_pins>;
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| };
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| 
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| &twl_gpio {
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| 	ti,use-leds;
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| };
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| 
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| &usb_otg_hs {
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| 	interface-type = <0>;
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| 	usb-phy = <&usb2_phy>;
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| 	phys = <&usb2_phy>;
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| 	phy-names = "usb2-phy";
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| 	mode = <3>;
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| 	power = <50>;
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| };
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