91 lines
1.1 KiB
Plaintext
91 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*/
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/ {
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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};
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chosen {
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u-boot,spl-boot-order = &emmc, &sdmmc;
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};
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rng: rng@ff0b0000 {
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compatible = "rockchip,cryptov2-rng";
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reg = <0x0 0xff0b0000 0x0 0x4000>;
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status = "disabled";
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};
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};
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&dmc {
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u-boot,dm-pre-reloc;
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};
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&uart2 {
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clock-frequency = <24000000>;
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u-boot,dm-pre-reloc;
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};
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&uart5 {
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clock-frequency = <24000000>;
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u-boot,dm-pre-reloc;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&emmc {
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u-boot,dm-pre-reloc;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&grf {
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u-boot,dm-pre-reloc;
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};
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&pmugrf {
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u-boot,dm-pre-reloc;
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};
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&xin24m {
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u-boot,dm-pre-reloc;
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};
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&cru {
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u-boot,dm-pre-reloc;
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};
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&pmucru {
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u-boot,dm-pre-reloc;
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};
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&saradc {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&gpio0 {
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u-boot,dm-pre-reloc;
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};
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&gpio1 {
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u-boot,dm-pre-reloc;
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};
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&gpio2 {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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