24 lines
464 B
C
24 lines
464 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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* Copyright 2019 NXP Semiconductors
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*
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*/
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#ifndef __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_
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#define __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_BUS_CLK,
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MXC_UART_CLK,
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MXC_I2C_CLK,
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MXC_DSPI_CLK,
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};
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unsigned int mxc_get_clock(enum mxc_clock clk);
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ulong get_ddr_freq(ulong);
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uint get_svr(void);
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#endif /* __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ */
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