71 lines
1.5 KiB
C
71 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2012 Samsung Electronics
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* Donghwa Lee <dh09.lee@samsung.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/system.h>
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static void exynos5_set_usbhost_mode(unsigned int mode)
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{
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struct exynos5_sysreg *sysreg =
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(struct exynos5_sysreg *)samsung_get_base_sysreg();
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/* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */
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if (mode == USB20_PHY_CFG_HOST_LINK_EN) {
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setbits_le32(&sysreg->usb20phy_cfg,
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USB20_PHY_CFG_HOST_LINK_EN);
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} else {
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clrbits_le32(&sysreg->usb20phy_cfg,
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USB20_PHY_CFG_HOST_LINK_EN);
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}
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}
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void set_usbhost_mode(unsigned int mode)
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{
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if (cpu_is_exynos5())
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exynos5_set_usbhost_mode(mode);
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}
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static void exynos4_set_system_display(void)
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{
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struct exynos4_sysreg *sysreg =
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(struct exynos4_sysreg *)samsung_get_base_sysreg();
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unsigned int cfg = 0;
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/*
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* system register path set
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* 0: MIE/MDNIE
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* 1: FIMD Bypass
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*/
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cfg = readl(&sysreg->display_ctrl);
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cfg |= (1 << 1);
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writel(cfg, &sysreg->display_ctrl);
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}
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static void exynos5_set_system_display(void)
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{
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struct exynos5_sysreg *sysreg =
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(struct exynos5_sysreg *)samsung_get_base_sysreg();
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unsigned int cfg = 0;
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/*
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* system register path set
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* 0: MIE/MDNIE
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* 1: FIMD Bypass
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*/
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cfg = readl(&sysreg->disp1blk_cfg);
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cfg |= (1 << 15);
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writel(cfg, &sysreg->disp1blk_cfg);
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}
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void set_system_display_ctrl(void)
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{
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if (cpu_is_exynos4())
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exynos4_set_system_display();
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else
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exynos5_set_system_display();
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}
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