138 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			138 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
| // SPDX-License-Identifier: GPL-2.0+ OR X11
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| /*
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|  * P5040 Silicon/SoC Device Tree Source (pre include)
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|  *
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|  * Copyright 2012 - 2015 Freescale Semiconductor Inc.
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|  * Copyright 2019-2020 NXP
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|  */
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| 
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| /dts-v1/;
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| 
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| /include/ "e5500_power_isa.dtsi"
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| 
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| / {
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| 	#address-cells = <2>;
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| 	#size-cells = <2>;
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| 	interrupt-parent = <&mpic>;
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| 
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| 	cpus {
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 
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| 		cpu0: PowerPC,e5500@0 {
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| 			device_type = "cpu";
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| 			reg = <0>;
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| 			fsl,portid-mapping = <0x80000000>;
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| 		};
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| 		cpu1: PowerPC,e5500@1 {
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| 			device_type = "cpu";
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| 			reg = <1>;
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| 			fsl,portid-mapping = <0x40000000>;
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| 		};
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| 		cpu2: PowerPC,e5500@2 {
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| 			device_type = "cpu";
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| 			reg = <2>;
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| 			fsl,portid-mapping = <0x20000000>;
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| 		};
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| 		cpu3: PowerPC,e5500@3 {
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| 			device_type = "cpu";
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| 			reg = <3>;
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| 			fsl,portid-mapping = <0x10000000>;
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| 		};
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| 	};
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| 
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| 	soc: soc@ffe000000 {
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| 		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
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| 		reg = <0xf 0xfe000000 0 0x00001000>;
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 		device_type = "soc";
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| 		compatible = "simple-bus";
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| 
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| 		mpic: pic@40000 {
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| 			interrupt-controller;
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| 			#address-cells = <0>;
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| 			#interrupt-cells = <4>;
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| 			reg = <0x40000 0x40000>;
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| 			compatible = "fsl,mpic", "chrp,open-pic";
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| 			device_type = "open-pic";
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| 			clock-frequency = <0x0>;
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| 		};
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| 
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| 		espi0: spi@110000 {
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| 			compatible = "fsl,mpc8536-espi";
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <0x110000 0x1000>;
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| 			fsl,espi-num-chipselects = <4>;
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| 			status = "disabled";
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| 		};
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| 
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| 		usb@210000 {
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| 			compatible = "fsl-usb2-mph";
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| 			reg = <0x210000 0x1000>;
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| 			phy_type = "utmi";
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| 		};
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| 
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| 		usb@211000 {
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| 			compatible = "fsl-usb2-dr";
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| 			reg = <0x211000 0x1000>;
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| 			phy_type = "utmi";
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| 		};
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| 
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| 		sata: sata@220000 {
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| 			compatible = "fsl,pq-sata-v2";
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| 			reg = <0x220000 0x1000>;
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| 			interrupts = <68 0x2 0 0>;
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| 			sata-offset = <0x1000>;
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| 			sata-number = <2>;
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| 			sata-fpdma = <0>;
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| 		};
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| 
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| 		esdhc: esdhc@114000 {
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| 			compatible = "fsl,esdhc";
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| 			reg = <0x114000 0x1000>;
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| 			clock-frequency = <0>;
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| 		};
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| 
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| 		/include/ "qoriq-i2c-0.dtsi"
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| 		/include/ "qoriq-i2c-1.dtsi"
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| 	};
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| 
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| 	pcie@ffe200000 {
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| 		compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq";
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| 		reg = <0xf 0xfe200000 0x0 0x1000>;   /* registers */
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| 		law_trgt_if = <0>;
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| 		#address-cells = <3>;
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| 		#size-cells = <2>;
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| 		device_type = "pci";
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| 		bus-range = <0x0 0xff>;
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| 		ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000   /* downstream I/O */
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| 			  0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */
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| 	};
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| 
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| 	pcie@ffe201000 {
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| 		compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq";
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| 		reg = <0xf 0xfe201000 0x0 0x1000>;   /* registers */
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| 		law_trgt_if = <1>;
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| 		#address-cells = <3>;
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| 		#size-cells = <2>;
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| 		device_type = "pci";
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| 		bus-range = <0x0 0xff>;
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| 		ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000   /* downstream I/O */
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| 			  0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000>; /* non-prefetchable memory */
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| 	};
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| 
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| 	pcie@ffe202000 {
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| 		compatible = "fsl,pcie-p5040", "fsl,pcie-fsl-qoriq";
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| 		reg = <0xf 0xfe202000 0x0 0x1000>;   /* registers */
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| 		law_trgt_if = <2>;
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| 		#address-cells = <3>;
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| 		#size-cells = <2>;
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| 		device_type = "pci";
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| 		bus-range = <0x0 0xff>;
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| 		ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000   /* downstream I/O */
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| 			  0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000>; /* non-prefetchable memory */
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| 	};
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| };
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