106 lines
1.6 KiB
Plaintext
106 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2018-2019 SiFive, Inc */
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#include "fu540-c000.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
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#define RTCCLK_FREQ 1000000
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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model = "SiFive HiFive Unleashed A00";
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compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
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chosen {
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stdout-path = "serial0";
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};
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cpus {
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timebase-frequency = <RTCCLK_FREQ>;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x2 0x00000000>;
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};
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soc {
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};
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hfclk: hfclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <33333333>;
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clock-output-names = "hfclk";
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};
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rtcclk: rtcclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <RTCCLK_FREQ>;
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clock-output-names = "rtcclk";
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};
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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};
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&qspi0 {
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status = "okay";
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flash@0 {
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compatible = "issi,is25wp256", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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};
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};
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&qspi2 {
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status = "okay";
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mmc@0 {
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compatible = "mmc-spi-slot";
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reg = <0>;
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spi-max-frequency = <20000000>;
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voltage-ranges = <3300 3300>;
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disable-wp;
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};
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};
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ð0 {
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status = "okay";
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phy-mode = "gmii";
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phy-handle = <&phy0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&pwm0 {
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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