76 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			76 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Copyright 2014 Freescale Semiconductor, Inc.
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|  * Copyright 2020 NXP
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|  */
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| 
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| #ifndef __VID_H_
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| #define __VID_H_
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| 
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| /* IR36021 command codes */
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| #define IR36021_LOOP1_MANUAL_ID_OFFSET	0x6A
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| #define IR36021_LOOP1_VOUT_OFFSET	0x9A
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| #define IR36021_MFR_ID_OFFSET		0x92
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| #define IR36021_MFR_ID			0x43
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| #define IR36021_INTEL_MODE_OFFSET	0x14
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| #define IR36021_MODE_MASK		0x20
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| #define IR36021_INTEL_MODE		0x00
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| #define IR36021_AMD_MODE		0x20
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| 
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| /* Step the IR regulator in 5mV increments */
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| #define IR_VDD_STEP_DOWN		5
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| #define IR_VDD_STEP_UP			5
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| 
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| /* LTC3882 */
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| #define PMBUS_CMD_WRITE_PROTECT         0x10
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| /*
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|  * WRITE_PROTECT command supported values
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|  * 0x80: Disable all writes except WRITE_PROTECT, PAGE,
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|  *       STORE_USER_ALL and MFR_EE_UNLOCK commands.
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|  * 0x40: Disable all writes except WRITE_PROTECT, PAGE, STORE_USER_ALL,
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|  *       MFR_EE_UNLOCK, OPERATION, CLEAR_PEAKS and CLEAR_FAULTS commands.
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|  *       Individual faults can also be cleared by writing a 1 to the
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|  *       respective status bit.
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|  * 0x20: Disable all writes except WRITE_PROTECT, PAGE, STORE_USER_ ALL,
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|  *       MFR_EE_UNLOCK, OPERATION, CLEAR_PEAKS, CLEAR_FAULTS, ON_OFF_CONFIG
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|  *       and VOUT_COMMAND commands. Individual faults can be cleared by
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|  *       writing a 1 to the respective status bit.
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|  * 0x00: Enables write to all commands
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|  */
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| #define EN_WRITE_ALL_CMD (0)
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| 
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| #ifdef CONFIG_TARGET_LX2160ARDB
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| /* The lowest and highest voltage allowed*/
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| #define VDD_MV_MIN			775
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| #define VDD_MV_MAX			855
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| #endif
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| 
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| #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS)
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| /* The lowest and highest voltage allowed*/
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| #define VDD_MV_MIN			775
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| #define VDD_MV_MAX			925
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| #endif
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| 
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| /* PM Bus commands code for LTC3882*/
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| #define PWM_CHANNEL0                    0x0
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| #define PMBUS_CMD_PAGE                  0x0
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| #define PMBUS_CMD_READ_VOUT             0x8B
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| #define PMBUS_CMD_VOUT_MODE			0x20
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| #define PMBUS_CMD_VOUT_COMMAND          0x21
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| #define PMBUS_CMD_PAGE_PLUS_WRITE       0x05
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| 
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| #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) || \
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| defined(CONFIG_TARGET_LX2160ARDB)
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| /* Voltage monitor on channel 2*/
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| #define I2C_VOL_MONITOR_BUS_V_OFFSET	0x2
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| #define I2C_VOL_MONITOR_BUS_V_OVF	0x1
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| #define I2C_VOL_MONITOR_BUS_V_SHIFT	3
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| #define I2C_VOL_MONITOR_ADDR            0x63
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| #define I2C_MUX_CH_VOL_MONITOR		0xA
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| #endif
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| 
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| int adjust_vdd(ulong vdd_override);
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| u16 soc_get_fuse_vid(int vid_index);
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| 
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| #endif  /* __VID_H_ */
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