80 lines
2.0 KiB
C
80 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*/
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#ifndef __CONFIG_RK3399_COMMON_H
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#define __CONFIG_RK3399_COMMON_H
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#include "rockchip-common.h"
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0
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#define CONFIG_IRAM_BASE 0xff8c0000
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#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
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#define CONFIG_SYS_LOAD_ADDR 0x00800800
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
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#define CONFIG_SPL_STACK 0x00400000
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#define CONFIG_SPL_MAX_SIZE 0x40000
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#define CONFIG_SPL_BSS_START_ADDR 0x00400000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
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#else
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#define CONFIG_SPL_STACK 0xff8effff
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#define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000
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/* BSS setup */
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#define CONFIG_SPL_BSS_START_ADDR 0xff8e0000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x10000
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#endif
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
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/* MMC/SD IP block */
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#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
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/* RAW SD card / eMMC locations. */
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/* FAT sd card locations. */
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#define CONFIG_SYS_SDRAM_BASE 0
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#define SDRAM_MAX_SIZE 0xf8000000
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#ifndef CONFIG_SPL_BUILD
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00500000\0" \
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"script_offset_f=0xffe000\0" \
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"script_size_f=0x2000\0" \
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"pxefile_addr_r=0x00600000\0" \
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"fdt_addr_r=0x01f00000\0" \
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"fdtoverlay_addr_r=0x02000000\0" \
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"kernel_addr_r=0x02080000\0" \
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"ramdisk_addr_r=0x06000000\0" \
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"kernel_comp_addr_r=0x08000000\0" \
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"kernel_comp_size=0x2000000\0"
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#ifndef ROCKCHIP_DEVICE_SETTINGS
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#define ROCKCHIP_DEVICE_SETTINGS
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#endif
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#include <config_distro_bootcmd.h>
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#include <environment/distro/sf.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_MEM_LAYOUT_SETTINGS \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"partitions=" PARTS_DEFAULT \
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ROCKCHIP_DEVICE_SETTINGS \
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BOOTENV \
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BOOTENV_SF \
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"altbootcmd=" \
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"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
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"run distro_bootcmd\0"
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#endif
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#endif
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