79 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			79 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
/*
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 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#ifndef _ARCH_IRQ_H_
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#define _ARCH_IRQ_H_
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#include <dt-bindings/interrupt-router/intel-irq.h>
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/**
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 * Intel interrupt router configuration mechanism
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 *
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 * There are two known ways of Intel interrupt router configuration mechanism
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 * so far. On most cases, the IRQ routing configuraiton is controlled by PCI
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 * configuraiton registers on the legacy bridge, normally PCI BDF(0, 31, 0).
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 * On some newer platforms like BayTrail and Braswell, the IRQ routing is now
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 * in the IBASE register block where IBASE is memory-mapped.
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 */
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enum pirq_config {
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	PIRQ_VIA_PCI,
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	PIRQ_VIA_IBASE
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};
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/**
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 * Intel interrupt router control block
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 *
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 * Its members' value will be filled in based on device tree's input.
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 *
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 * @config:	PIRQ_VIA_PCI or PIRQ_VIA_IBASE
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 * @link_base:	link value base number
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 * @irq_mask:	IRQ mask reprenting the 16 IRQs in 8259, bit N is 1 means
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 *		IRQ N is available to be routed
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 * @lb_bdf:	irq router's PCI bus/device/function number encoding
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 * @ibase:	IBASE register block base address
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 */
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struct irq_router {
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	int config;
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	u32 link_base;
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	u16 irq_mask;
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	u32 bdf;
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	u32 ibase;
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};
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struct pirq_routing {
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	int bdf;
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	int pin;
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	int pirq;
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};
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/* PIRQ link number and value conversion */
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#define LINK_V2N(link, base)	(link - base)
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#define LINK_N2V(link, base)	(link + base)
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#define PIRQ_BITMAP		0xdef8
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/**
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 * cpu_irq_init() - Initialize CPU IRQ routing
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 *
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 * This initializes some platform-specific registers related to IRQ routing,
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 * like configuring internal PCI devices to use which PCI interrupt pin,
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 * and which PCI interrupt pin is mapped to which PIRQ line. Note on some
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 * platforms, such IRQ routing might be hard-coded thus cannot configure.
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 */
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void cpu_irq_init(void);
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/**
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 * pirq_init() - Initialize platform PIRQ routing
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 *
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 * This initializes the PIRQ routing on the platform and configures all PCI
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 * devices' interrupt line register to a working IRQ number on the 8259 PIC.
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 *
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 * @return 0 if OK, -ve on error
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 */
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int pirq_init(void);
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#endif /* _ARCH_IRQ_H_ */
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