162 lines
3.3 KiB
ArmAsm
162 lines
3.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2013 Regents of the University of California
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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/* void *memcpy(void *, const void *, size_t) */
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ENTRY(__memcpy)
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WEAK(memcpy)
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beq a0, a1, .copy_end
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/* Save for return value */
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mv t6, a0
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/*
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* Register allocation for code below:
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* a0 - start of uncopied dst
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* a1 - start of uncopied src
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* t0 - end of uncopied dst
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*/
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add t0, a0, a2
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/*
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* Use bytewise copy if too small.
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*
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* This threshold must be at least 2*SZREG to ensure at least one
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* wordwise copy is performed. It is chosen to be 16 because it will
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* save at least 7 iterations of bytewise copy, which pays off the
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* fixed overhead.
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*/
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li a3, 16
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bltu a2, a3, .Lbyte_copy_tail
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/*
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* Bytewise copy first to align a0 to word boundary.
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*/
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addi a2, a0, SZREG-1
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andi a2, a2, ~(SZREG-1)
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beq a0, a2, 2f
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1:
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lb a5, 0(a1)
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addi a1, a1, 1
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sb a5, 0(a0)
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addi a0, a0, 1
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bne a0, a2, 1b
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2:
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/*
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* Now a0 is word-aligned. If a1 is also word aligned, we could perform
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* aligned word-wise copy. Otherwise we need to perform misaligned
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* word-wise copy.
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*/
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andi a3, a1, SZREG-1
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bnez a3, .Lmisaligned_word_copy
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/* Unrolled wordwise copy */
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addi t0, t0, -(16*SZREG-1)
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bgeu a0, t0, 2f
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1:
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REG_L a2, 0(a1)
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REG_L a3, SZREG(a1)
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REG_L a4, 2*SZREG(a1)
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REG_L a5, 3*SZREG(a1)
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REG_L a6, 4*SZREG(a1)
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REG_L a7, 5*SZREG(a1)
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REG_L t1, 6*SZREG(a1)
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REG_L t2, 7*SZREG(a1)
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REG_L t3, 8*SZREG(a1)
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REG_L t4, 9*SZREG(a1)
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REG_L t5, 10*SZREG(a1)
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REG_S a2, 0(a0)
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REG_S a3, SZREG(a0)
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REG_S a4, 2*SZREG(a0)
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REG_S a5, 3*SZREG(a0)
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REG_S a6, 4*SZREG(a0)
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REG_S a7, 5*SZREG(a0)
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REG_S t1, 6*SZREG(a0)
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REG_S t2, 7*SZREG(a0)
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REG_S t3, 8*SZREG(a0)
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REG_S t4, 9*SZREG(a0)
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REG_S t5, 10*SZREG(a0)
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REG_L a2, 11*SZREG(a1)
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REG_L a3, 12*SZREG(a1)
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REG_L a4, 13*SZREG(a1)
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REG_L a5, 14*SZREG(a1)
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REG_L a6, 15*SZREG(a1)
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addi a1, a1, 16*SZREG
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REG_S a2, 11*SZREG(a0)
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REG_S a3, 12*SZREG(a0)
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REG_S a4, 13*SZREG(a0)
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REG_S a5, 14*SZREG(a0)
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REG_S a6, 15*SZREG(a0)
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addi a0, a0, 16*SZREG
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bltu a0, t0, 1b
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2:
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/* Post-loop increment by 16*SZREG-1 and pre-loop decrement by SZREG-1 */
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addi t0, t0, 15*SZREG
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/* Wordwise copy */
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bgeu a0, t0, 2f
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1:
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REG_L a5, 0(a1)
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addi a1, a1, SZREG
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REG_S a5, 0(a0)
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addi a0, a0, SZREG
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bltu a0, t0, 1b
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2:
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addi t0, t0, SZREG-1
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.Lbyte_copy_tail:
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/*
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* Bytewise copy anything left.
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*/
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beq a0, t0, 2f
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1:
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lb a5, 0(a1)
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addi a1, a1, 1
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sb a5, 0(a0)
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addi a0, a0, 1
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bne a0, t0, 1b
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2:
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mv a0, t6
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.copy_end:
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ret
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.Lmisaligned_word_copy:
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/*
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* Misaligned word-wise copy.
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* For misaligned copy we still perform word-wise copy, but we need to
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* use the value fetched from the previous iteration and do some shifts.
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* This is safe because we wouldn't access more words than necessary.
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*/
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/* Calculate shifts */
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slli t3, a3, 3
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sub t4, x0, t3 /* negate is okay as shift will only look at LSBs */
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/* Load the initial value and align a1 */
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andi a1, a1, ~(SZREG-1)
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REG_L a5, 0(a1)
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addi t0, t0, -(SZREG-1)
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/* At least one iteration will be executed here, no check */
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1:
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srl a4, a5, t3
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REG_L a5, SZREG(a1)
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addi a1, a1, SZREG
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sll a2, a5, t4
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or a2, a2, a4
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REG_S a2, 0(a0)
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addi a0, a0, SZREG
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bltu a0, t0, 1b
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/* Update pointers to correct value */
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addi t0, t0, SZREG-1
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add a1, a1, a3
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j .Lbyte_copy_tail
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END(__memcpy)
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