152 lines
3.0 KiB
C
152 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com>
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* Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
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*
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* Based on sheevaplug.c originally written by
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* Prafulla Wadaskar <prafulla@marvell.com>
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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*/
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#include <common.h>
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#include <bootstage.h>
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#include <init.h>
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#include <netdev.h>
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#include <asm/arch/soc.h>
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#include <asm/arch/mpp.h>
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#include <asm/arch/cpu.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <linux/bitops.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define DOCKSTAR_OE_LOW (~(0))
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#define DOCKSTAR_OE_HIGH (~(0))
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#define DOCKSTAR_OE_VAL_LOW BIT(29) /* USB_PWEN low */
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#define DOCKSTAR_OE_VAL_HIGH BIT(17) /* LED pin high */
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int board_early_init_f(void)
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{
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/*
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* default gpio configuration
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* There are maximum 64 gpios controlled through 2 sets of registers
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* the below configuration configures mainly initial LED status
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*/
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mvebu_config_gpio(DOCKSTAR_OE_VAL_LOW,
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DOCKSTAR_OE_VAL_HIGH,
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DOCKSTAR_OE_LOW, DOCKSTAR_OE_HIGH);
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/* Multi-Purpose Pins Functionality configuration */
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static const u32 kwmpp_config[] = {
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MPP0_NF_IO2,
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MPP1_NF_IO3,
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MPP2_NF_IO4,
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MPP3_NF_IO5,
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MPP4_NF_IO6,
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MPP5_NF_IO7,
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MPP6_SYSRST_OUTn,
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MPP7_GPO,
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MPP8_UART0_RTS,
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MPP9_UART0_CTS,
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MPP10_UART0_TXD,
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MPP11_UART0_RXD,
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MPP12_SD_CLK,
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MPP13_SD_CMD,
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MPP14_SD_D0,
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MPP15_SD_D1,
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MPP16_SD_D2,
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MPP17_SD_D3,
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MPP18_NF_IO0,
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MPP19_NF_IO1,
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MPP20_GPIO,
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MPP21_GPIO,
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MPP22_GPIO,
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MPP23_GPIO,
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MPP24_GPIO,
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MPP25_GPIO,
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MPP26_GPIO,
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MPP27_GPIO,
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MPP28_GPIO,
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MPP29_TSMP9,
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MPP30_GPIO,
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MPP31_GPIO,
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MPP32_GPIO,
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MPP33_GPIO,
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MPP34_GPIO,
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MPP35_GPIO,
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MPP36_GPIO,
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MPP37_GPIO,
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MPP38_GPIO,
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MPP39_GPIO,
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MPP40_GPIO,
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MPP41_GPIO,
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MPP42_GPIO,
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MPP43_GPIO,
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MPP44_GPIO,
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MPP45_GPIO,
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MPP46_GPIO,
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MPP47_GPIO,
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MPP48_GPIO,
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MPP49_GPIO,
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0
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};
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kirkwood_mpp_conf(kwmpp_config, NULL);
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return 0;
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}
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int board_eth_init(struct bd_info *bis)
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{
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return cpu_eth_init(bis);
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}
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int board_init(void)
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{
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/*
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* arch number of board
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*/
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gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR;
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/* address of boot parameters */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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return 0;
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}
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#if CONFIG_IS_ENABLED(BOOTSTAGE)
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#define GREEN_LED BIT(14)
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#define ORANGE_LED BIT(15)
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#define BOTH_LEDS (GREEN_LED | ORANGE_LED)
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#define NEITHER_LED 0
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static void set_leds(u32 leds, u32 blinking)
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{
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struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
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u32 oe;
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u32 bl;
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oe = readl(&r->oe) | BOTH_LEDS;
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writel(oe & ~leds, &r->oe); /* active low */
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bl = readl(&r->blink_en) & ~BOTH_LEDS;
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writel(bl | blinking, &r->blink_en);
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}
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void show_boot_progress(int val)
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{
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switch (val) {
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case BOOTSTAGE_ID_RUN_OS: /* booting Linux */
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set_leds(BOTH_LEDS, NEITHER_LED);
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break;
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case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */
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set_leds(GREEN_LED, GREEN_LED);
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break;
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default:
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if (val < 0) /* error */
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set_leds(ORANGE_LED, ORANGE_LED);
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break;
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}
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}
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#endif
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