485 lines
16 KiB
C
485 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/io.h>
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#include <asm/test.h>
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#include <dm/test.h>
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#include <test/test.h>
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#include <test/ut.h>
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/* Test that sandbox PCI works correctly */
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static int dm_test_pci_base(struct unit_test_state *uts)
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{
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struct udevice *bus;
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ut_assertok(uclass_get_device(UCLASS_PCI, 0, &bus));
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return 0;
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}
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DM_TEST(dm_test_pci_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test that sandbox PCI bus numbering and device works correctly */
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static int dm_test_pci_busdev(struct unit_test_state *uts)
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{
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struct udevice *bus;
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struct udevice *swap;
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u16 vendor, device;
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/* Test bus#0 and its devices */
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ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap));
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vendor = 0;
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ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
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ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
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device = 0;
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ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
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ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device);
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/* Test bus#1 and its devices */
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ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
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vendor = 0;
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ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
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ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap));
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device = 0;
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ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
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ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device);
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return 0;
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}
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DM_TEST(dm_test_pci_busdev, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test that we can use the swapcase device correctly */
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static int dm_test_pci_swapcase(struct unit_test_state *uts)
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{
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struct udevice *swap;
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ulong io_addr, mem_addr;
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char *ptr;
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/* Check that asking for the device 0 automatically fires up PCI */
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap));
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/* First test I/O */
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io_addr = dm_pci_read_bar32(swap, 0);
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outb(2, io_addr);
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ut_asserteq(2, inb(io_addr));
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/*
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* Now test memory mapping - note we must unmap and remap to cause
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* the swapcase emulation to see our data and response.
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*/
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mem_addr = dm_pci_read_bar32(swap, 1);
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ptr = map_sysmem(mem_addr, 20);
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strcpy(ptr, "This is a TesT");
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unmap_sysmem(ptr);
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ptr = map_sysmem(mem_addr, 20);
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ut_asserteq_str("tHIS IS A tESt", ptr);
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unmap_sysmem(ptr);
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/* Check that asking for the device 1 automatically fires up PCI */
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
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/* First test I/O */
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io_addr = dm_pci_read_bar32(swap, 0);
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outb(2, io_addr);
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ut_asserteq(2, inb(io_addr));
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/*
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* Now test memory mapping - note we must unmap and remap to cause
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* the swapcase emulation to see our data and response.
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*/
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mem_addr = dm_pci_read_bar32(swap, 1);
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ptr = map_sysmem(mem_addr, 20);
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strcpy(ptr, "This is a TesT");
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unmap_sysmem(ptr);
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ptr = map_sysmem(mem_addr, 20);
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ut_asserteq_str("tHIS IS A tESt", ptr);
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unmap_sysmem(ptr);
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return 0;
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}
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DM_TEST(dm_test_pci_swapcase, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test that we can dynamically bind the device driver correctly */
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static int dm_test_pci_drvdata(struct unit_test_state *uts)
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{
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struct udevice *bus, *swap;
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/* Check that asking for the device automatically fires up PCI */
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ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
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ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
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ut_assertok(dev_has_ofnode(swap));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap));
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ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
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ut_assertok(dev_has_ofnode(swap));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x10, 0), &swap));
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ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
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ut_assertok(!dev_has_ofnode(swap));
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return 0;
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}
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DM_TEST(dm_test_pci_drvdata, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test that devices on PCI bus#2 can be accessed correctly */
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static int dm_test_pci_mixed(struct unit_test_state *uts)
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{
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/* PCI bus#2 has both statically and dynamic declared devices */
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struct udevice *bus, *swap;
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u16 vendor, device;
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ulong io_addr, mem_addr;
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char *ptr;
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ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 2, &bus));
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/* Test the dynamic device */
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x08, 0), &swap));
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vendor = 0;
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ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
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ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
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/* First test I/O */
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io_addr = dm_pci_read_bar32(swap, 0);
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outb(2, io_addr);
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ut_asserteq(2, inb(io_addr));
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/*
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* Now test memory mapping - note we must unmap and remap to cause
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* the swapcase emulation to see our data and response.
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*/
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mem_addr = dm_pci_read_bar32(swap, 1);
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ptr = map_sysmem(mem_addr, 30);
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strcpy(ptr, "This is a TesT oN dYNAMIc");
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unmap_sysmem(ptr);
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ptr = map_sysmem(mem_addr, 30);
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ut_asserteq_str("tHIS IS A tESt On DynamiC", ptr);
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unmap_sysmem(ptr);
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/* Test the static device */
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x1f, 0), &swap));
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device = 0;
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ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
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ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device);
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/* First test I/O */
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io_addr = dm_pci_read_bar32(swap, 0);
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outb(2, io_addr);
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ut_asserteq(2, inb(io_addr));
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/*
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* Now test memory mapping - note we must unmap and remap to cause
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* the swapcase emulation to see our data and response.
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*/
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mem_addr = dm_pci_read_bar32(swap, 1);
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ptr = map_sysmem(mem_addr, 30);
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strcpy(ptr, "This is a TesT oN sTATIc");
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unmap_sysmem(ptr);
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ptr = map_sysmem(mem_addr, 30);
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ut_asserteq_str("tHIS IS A tESt On StatiC", ptr);
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unmap_sysmem(ptr);
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return 0;
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}
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DM_TEST(dm_test_pci_mixed, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test looking up PCI capability and extended capability */
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static int dm_test_pci_cap(struct unit_test_state *uts)
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{
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struct udevice *bus, *swap;
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int cap;
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ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
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/* look up PCI_CAP_ID_EXP */
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cap = dm_pci_find_capability(swap, PCI_CAP_ID_EXP);
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ut_asserteq(PCI_CAP_ID_EXP_OFFSET, cap);
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/* look up PCI_CAP_ID_PCIX */
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cap = dm_pci_find_capability(swap, PCI_CAP_ID_PCIX);
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ut_asserteq(0, cap);
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/* look up PCI_CAP_ID_MSIX starting from PCI_CAP_ID_PM_OFFSET */
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cap = dm_pci_find_next_capability(swap, PCI_CAP_ID_PM_OFFSET,
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PCI_CAP_ID_MSIX);
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ut_asserteq(PCI_CAP_ID_MSIX_OFFSET, cap);
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/* look up PCI_CAP_ID_VNDR starting from PCI_CAP_ID_EXP_OFFSET */
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cap = dm_pci_find_next_capability(swap, PCI_CAP_ID_EXP_OFFSET,
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PCI_CAP_ID_VNDR);
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ut_asserteq(0, cap);
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ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
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/* look up PCI_EXT_CAP_ID_DSN */
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cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_DSN);
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ut_asserteq(PCI_EXT_CAP_ID_DSN_OFFSET, cap);
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/* look up PCI_EXT_CAP_ID_SRIOV */
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cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_SRIOV);
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ut_asserteq(0, cap);
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/* look up PCI_EXT_CAP_ID_DSN starting from PCI_EXT_CAP_ID_ERR_OFFSET */
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cap = dm_pci_find_next_ext_capability(swap, PCI_EXT_CAP_ID_ERR_OFFSET,
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PCI_EXT_CAP_ID_DSN);
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ut_asserteq(PCI_EXT_CAP_ID_DSN_OFFSET, cap);
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/* look up PCI_EXT_CAP_ID_RCRB starting from PCI_EXT_CAP_ID_VC_OFFSET */
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cap = dm_pci_find_next_ext_capability(swap, PCI_EXT_CAP_ID_VC_OFFSET,
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PCI_EXT_CAP_ID_RCRB);
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ut_asserteq(0, cap);
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return 0;
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}
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DM_TEST(dm_test_pci_cap, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test looking up BARs in EA capability structure */
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static int dm_test_pci_ea(struct unit_test_state *uts)
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{
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struct udevice *bus, *swap;
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void *bar;
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int cap;
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/*
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* use emulated device mapping function, we're not using real physical
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* addresses in this test
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*/
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sandbox_set_enable_pci_map(true);
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ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x01, 0), &swap));
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/* look up PCI_CAP_ID_EA */
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cap = dm_pci_find_capability(swap, PCI_CAP_ID_EA);
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ut_asserteq(PCI_CAP_ID_EA_OFFSET, cap);
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/* test swap case in BAR 1 */
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bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE, 0);
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ut_assertnonnull(bar);
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*(int *)bar = 2; /* swap upper/lower */
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bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0, 0, PCI_REGION_TYPE, 0);
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ut_assertnonnull(bar);
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strcpy(bar, "ea TEST");
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unmap_sysmem(bar);
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bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_1, 0, 0, PCI_REGION_TYPE, 0);
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ut_assertnonnull(bar);
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ut_asserteq_str("EA test", bar);
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/* test magic values in BARs2, 4; BAR 3 is n/a */
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bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_2, 0, 0, PCI_REGION_TYPE, 0);
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ut_assertnonnull(bar);
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ut_asserteq(PCI_EA_BAR2_MAGIC, *(u32 *)bar);
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bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_3, 0, 0, PCI_REGION_TYPE, 0);
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ut_assertnull(bar);
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bar = dm_pci_map_bar(swap, PCI_BASE_ADDRESS_4, 0, 0, PCI_REGION_TYPE, 0);
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ut_assertnonnull(bar);
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ut_asserteq(PCI_EA_BAR4_MAGIC, *(u32 *)bar);
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return 0;
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}
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DM_TEST(dm_test_pci_ea, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/* Test the dev_read_addr_pci() function */
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static int dm_test_pci_addr_flat(struct unit_test_state *uts)
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{
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struct udevice *swap1f, *swap1;
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ulong io_addr, mem_addr;
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f));
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io_addr = dm_pci_read_bar32(swap1f, 0);
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ut_asserteq(io_addr, dev_read_addr_pci(swap1f));
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/*
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* This device has both I/O and MEM spaces but the MEM space appears
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* first
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*/
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1));
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mem_addr = dm_pci_read_bar32(swap1, 1);
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ut_asserteq(mem_addr, dev_read_addr_pci(swap1));
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return 0;
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}
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DM_TEST(dm_test_pci_addr_flat, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT |
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UT_TESTF_FLAT_TREE);
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/*
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* Test the dev_read_addr_pci() function with livetree. That function is
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* not currently fully implemented, in that it fails to return the BAR address.
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* Once that is implemented this test can be removed and dm_test_pci_addr_flat()
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* can be used for both flattree and livetree by removing the UT_TESTF_FLAT_TREE
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* flag above.
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*/
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static int dm_test_pci_addr_live(struct unit_test_state *uts)
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{
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struct udevice *swap1f, *swap1;
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f));
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ut_asserteq_64(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1f));
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1));
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ut_asserteq_64(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1));
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return 0;
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}
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DM_TEST(dm_test_pci_addr_live, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT |
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UT_TESTF_LIVE_TREE);
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/* Test device_is_on_pci_bus() */
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static int dm_test_pci_on_bus(struct unit_test_state *uts)
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{
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struct udevice *dev;
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &dev));
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ut_asserteq(true, device_is_on_pci_bus(dev));
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ut_asserteq(false, device_is_on_pci_bus(dev_get_parent(dev)));
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ut_asserteq(true, device_is_on_pci_bus(dev));
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return 0;
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}
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DM_TEST(dm_test_pci_on_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/*
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* Test support for multiple memory regions enabled via
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* CONFIG_PCI_REGION_MULTI_ENTRY. When this feature is not enabled,
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* only the last region of one type is stored. In this test-case,
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* we have 2 memory regions, the first at 0x3000.0000 and the 2nd
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* at 0x3100.0000. A correct test results now in BAR1 located at
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* 0x3000.0000.
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*/
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static int dm_test_pci_region_multi(struct unit_test_state *uts)
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{
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struct udevice *dev;
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ulong mem_addr;
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/* Test memory BAR1 on bus#1 */
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev));
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mem_addr = dm_pci_read_bar32(dev, 1);
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ut_asserteq(mem_addr, 0x30000000);
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return 0;
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}
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DM_TEST(dm_test_pci_region_multi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
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/*
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* Test the translation of PCI bus addresses to physical addresses using the
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* ranges from bus#1.
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*/
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static int dm_test_pci_bus_to_phys(struct unit_test_state *uts)
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{
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unsigned long mask = PCI_REGION_TYPE;
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unsigned long flags = PCI_REGION_MEM;
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struct udevice *dev;
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phys_addr_t phys_addr;
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ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev));
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/* Before any of the ranges. */
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phys_addr = dm_pci_bus_to_phys(dev, 0x20000000, 0x400, mask, flags);
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ut_asserteq(0, phys_addr);
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/* Identity range: whole, start, mid, end */
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phys_addr = dm_pci_bus_to_phys(dev, 0x2ffff000, 0x2000, mask, flags);
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ut_asserteq(0, phys_addr);
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phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x2000, mask, flags);
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ut_asserteq(0x30000000, phys_addr);
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phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x1000, mask, flags);
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ut_asserteq(0x30000000, phys_addr);
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phys_addr = dm_pci_bus_to_phys(dev, 0x30000abc, 0x12, mask, flags);
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ut_asserteq(0x30000abc, phys_addr);
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phys_addr = dm_pci_bus_to_phys(dev, 0x30000800, 0x1800, mask, flags);
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ut_asserteq(0x30000800, phys_addr);
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phys_addr = dm_pci_bus_to_phys(dev, 0x30008000, 0x1801, mask, flags);
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ut_asserteq(0, phys_addr);
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/* Translated range: whole, start, mid, end */
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phys_addr = dm_pci_bus_to_phys(dev, 0x30fff000, 0x2000, mask, flags);
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ut_asserteq(0, phys_addr);
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phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x2000, mask, flags);
|
|
ut_asserteq(0x3e000000, phys_addr);
|
|
phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x1000, mask, flags);
|
|
ut_asserteq(0x3e000000, phys_addr);
|
|
phys_addr = dm_pci_bus_to_phys(dev, 0x31000abc, 0x12, mask, flags);
|
|
ut_asserteq(0x3e000abc, phys_addr);
|
|
phys_addr = dm_pci_bus_to_phys(dev, 0x31000800, 0x1800, mask, flags);
|
|
ut_asserteq(0x3e000800, phys_addr);
|
|
phys_addr = dm_pci_bus_to_phys(dev, 0x31008000, 0x1801, mask, flags);
|
|
ut_asserteq(0, phys_addr);
|
|
|
|
/* Beyond all of the ranges. */
|
|
phys_addr = dm_pci_bus_to_phys(dev, 0x32000000, 0x400, mask, flags);
|
|
ut_asserteq(0, phys_addr);
|
|
|
|
return 0;
|
|
}
|
|
DM_TEST(dm_test_pci_bus_to_phys, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
|
|
|
|
/*
|
|
* Test the translation of physical addresses to PCI bus addresses using the
|
|
* ranges from bus#1.
|
|
*/
|
|
static int dm_test_pci_phys_to_bus(struct unit_test_state *uts)
|
|
{
|
|
unsigned long mask = PCI_REGION_TYPE;
|
|
unsigned long flags = PCI_REGION_MEM;
|
|
struct udevice *dev;
|
|
pci_addr_t pci_addr;
|
|
|
|
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev));
|
|
|
|
/* Before any of the ranges. */
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x20000000, 0x400, mask, flags);
|
|
ut_asserteq(0, pci_addr);
|
|
|
|
/* Identity range: partial overlap, whole, start, mid, end */
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x2ffff000, 0x2000, mask, flags);
|
|
ut_asserteq(0, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x2000, mask, flags);
|
|
ut_asserteq(0x30000000, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x1000, mask, flags);
|
|
ut_asserteq(0x30000000, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x30000abc, 0x12, mask, flags);
|
|
ut_asserteq(0x30000abc, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x30000800, 0x1800, mask, flags);
|
|
ut_asserteq(0x30000800, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x30008000, 0x1801, mask, flags);
|
|
ut_asserteq(0, pci_addr);
|
|
|
|
/* Translated range: partial overlap, whole, start, mid, end */
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x3dfff000, 0x2000, mask, flags);
|
|
ut_asserteq(0, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x2000, mask, flags);
|
|
ut_asserteq(0x31000000, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x1000, mask, flags);
|
|
ut_asserteq(0x31000000, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x3e000abc, 0x12, mask, flags);
|
|
ut_asserteq(0x31000abc, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x3e000800, 0x1800, mask, flags);
|
|
ut_asserteq(0x31000800, pci_addr);
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x3e008000, 0x1801, mask, flags);
|
|
ut_asserteq(0, pci_addr);
|
|
|
|
/* Beyond all of the ranges. */
|
|
pci_addr = dm_pci_phys_to_bus(dev, 0x3f000000, 0x400, mask, flags);
|
|
ut_asserteq(0, pci_addr);
|
|
|
|
return 0;
|
|
}
|
|
DM_TEST(dm_test_pci_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
|