The div loop uses reassign and reuse parent_rate, which causes
the parent rate reference to be wrong after the first loop, the
resulting clock becomes incorrect for div != 1.
Fixes:
|
||
|---|---|---|
| .. | ||
| upower | ||
| Kconfig | ||
| Makefile | ||
| cgc.c | ||
| clock.c | ||
| iomux.c | ||
| lowlevel_init.S | ||
| pcc.c | ||
| rdc.c | ||
| soc.c | ||