174 lines
		
	
	
		
			7.0 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			174 lines
		
	
	
		
			7.0 KiB
		
	
	
	
		
			C
		
	
	
	
/* Memory.h - Memory mappings and remapping functions declarations */
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/* Copyright - Galileo technology. */
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#ifndef __INCmemoryh
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#define __INCmemoryh
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/* includes */
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#include "core.h"
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/* defines */
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#define DONT_MODIFY	0xffffffff
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#define PARITY_SUPPORT	0x40000000
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#define MINIMUM_MEM_BANK_SIZE		0x10000
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#define MINIMUM_DEVICE_WINDOW_SIZE	0x10000
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#define MINIMUM_PCI_WINDOW_SIZE		0x10000
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#define MINIMUM_ACCESS_WIN_SIZE		0x10000
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#define _8BIT		0x00000000
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#define _16BIT		0x00100000
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#define _32BIT		0x00200000
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#define _64BIT		0x00300000
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/* typedefs */
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 typedef struct deviceParam
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{						/* boundary values  */
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    unsigned int    turnOff;			/* 0x0 - 0xf	    */
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    unsigned int    acc2First;			/* 0x0 - 0x1f	    */
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    unsigned int    acc2Next;		/* 0x0 - 0x1f	    */
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    unsigned int    ale2Wr;			/* 0x0 - 0xf	    */
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    unsigned int    wrLow;			/* 0x0 - 0xf	    */
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    unsigned int    wrHigh;			/* 0x0 - 0xf	    */
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    unsigned int    badrSkew;		/* 0x0 - 0x2	   */
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    unsigned int    DPEn;			/* 0x0 - 0x1	   */
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    unsigned int    deviceWidth;	/* in Bytes  */
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} DEVICE_PARAM;
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typedef enum __memBank{BANK0,BANK1,BANK2,BANK3} MEMORY_BANK;
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typedef enum __memDevice{DEVICE0,DEVICE1,DEVICE2,DEVICE3,BOOT_DEVICE} DEVICE;
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/*typedef enum __memoryProtectRegion{MEM_REGION0,MEM_REGION1,MEM_REGION2,	\
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				   MEM_REGION3,MEM_REGION4,MEM_REGION5,	      \
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				   MEM_REGION6,MEM_REGION7}		      \
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				   MEMORY_PROTECT_REGION;*/
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/* There are four possible windows that can be defined as protected */
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typedef enum _memoryProtectWindow{MEM_WINDOW0,MEM_WINDOW1,MEM_WINDOW2,
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				  MEM_WINDOW3
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				 } MEMORY_PROTECT_WINDOW;
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/* When defining a protected window , this paramter indicates whether it
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   is accessible or not */
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typedef enum __memoryAccess{MEM_ACCESS_ALLOWED,MEM_ACCESS_FORBIDEN}	      \
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			    MEMORY_ACCESS;
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typedef enum __memoryWrite{MEM_WRITE_ALLOWED,MEM_WRITE_FORBIDEN}	      \
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			   MEMORY_ACCESS_WRITE;
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typedef enum __memoryCacheProtect{MEM_CACHE_ALLOWED,MEM_CACHE_FORBIDEN}	      \
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				  MEMORY_CACHE_PROTECT;
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typedef enum __memorySnoopType{MEM_NO_SNOOP,MEM_SNOOP_WT,MEM_SNOOP_WB}	      \
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			       MEMORY_SNOOP_TYPE;
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typedef enum __memorySnoopRegion{MEM_SNOOP_REGION0,MEM_SNOOP_REGION1,	      \
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				 MEM_SNOOP_REGION2,MEM_SNOOP_REGION3}	      \
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				 MEMORY_SNOOP_REGION;
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/* There are 21 memory windows dedicated for the varios interfaces (PCI,
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   devCS (devices), CS(DDR), interenal registers and SRAM) used by the CPU's
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   address decoding mechanism. */
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typedef enum _memoryWindow {CS_0_WINDOW = BIT0, CS_1_WINDOW = BIT1,
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			    CS_2_WINDOW = BIT2, CS_3_WINDOW = BIT3,
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			    DEVCS_0_WINDOW = BIT4, DEVCS_1_WINDOW = BIT5,
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			    DEVCS_2_WINDOW = BIT6, DEVCS_3_WINDOW = BIT7,
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			    BOOT_CS_WINDOW = BIT8, PCI_0_IO_WINDOW = BIT9,
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			    PCI_0_MEM0_WINDOW = BIT10,
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			    PCI_0_MEM1_WINDOW = BIT11,
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			    PCI_0_MEM2_WINDOW = BIT12,
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			    PCI_0_MEM3_WINDOW = BIT13, PCI_1_IO_WINDOW = BIT14,
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			    PCI_1_MEM0_WINDOW = BIT15, PCI_1_MEM1_WINDOW =BIT16,
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			    PCI_1_MEM2_WINDOW = BIT17, PCI_1_MEM3_WINDOW =BIT18,
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			    INTEGRATED_SRAM_WINDOW = BIT19,
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			    INTERNAL_SPACE_WINDOW = BIT20,
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			    ALL_WINDOWS = 0X1FFFFF
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			   } MEMORY_WINDOW;
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typedef enum _memoryWindowStatus {MEM_WINDOW_ENABLED,MEM_WINDOW_DISABLED
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				 } MEMORY_WINDOW_STATUS;
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typedef enum _pciMemWindow{PCI_0_IO,PCI_0_MEM0,PCI_0_MEM1,PCI_0_MEM2,PCI_0_MEM3
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#ifdef INCLUDE_PCI_1
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			  ,PCI_1_IO,PCI_1_MEM0,PCI_1_MEM1,PCI_1_MEM2,PCI_1_MEM3
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#endif /* INCLUDE_PCI_1 */
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			  } PCI_MEM_WINDOW;
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/* -------------------------------------------------------------------------------------------------*/
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/* functions */
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unsigned int memoryGetBankBaseAddress(MEMORY_BANK bank);
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unsigned int memoryGetDeviceBaseAddress(DEVICE device);
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/* New at MV6436x */
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unsigned int MemoryGetPciBaseAddr(PCI_MEM_WINDOW pciWindow);
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unsigned int memoryGetBankSize(MEMORY_BANK bank);
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unsigned int memoryGetDeviceSize(DEVICE device);
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unsigned int memoryGetDeviceWidth(DEVICE device);
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/* New at MV6436x */
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unsigned int gtMemoryGetPciWindowSize(PCI_MEM_WINDOW pciWindow);
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/* when given base Address and size Set new WINDOW for SCS_X. (X = 0,1,2 or 3*/
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bool memoryMapBank(MEMORY_BANK bank, unsigned int bankBase,unsigned int bankLength);
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/* Set a new base and size for one of the memory banks (CS0 - CS3) */
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bool gtMemorySetMemoryBank(MEMORY_BANK bank, unsigned int bankBase,
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			   unsigned int bankSize);
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bool memoryMapDeviceSpace(DEVICE device, unsigned int deviceBase,unsigned int deviceLength);
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/* Change the Internal Register Base Address to a new given Address. */
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bool memoryMapInternalRegistersSpace(unsigned int internalRegBase);
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/* returns internal Register Space Base Address. */
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unsigned int memoryGetInternalRegistersSpace(void);
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/* Returns the integrated SRAM Base Address. */
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unsigned int memoryGetInternalSramBaseAddr(void);
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/* -------------------------------------------------------------------------------------------------*/
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/* Set new base address for the integrated SRAM. */
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void memorySetInternalSramBaseAddr(unsigned int sramBaseAddress);
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/* -------------------------------------------------------------------------------------------------*/
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/* Delete a protection feature to a given space. */
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void memoryDisableProtectRegion(MEMORY_PROTECT_WINDOW window);
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/* -------------------------------------------------------------------------------------------------*/
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/* Writes a new remap value to the remap register */
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unsigned int memorySetPciRemapValue(PCI_MEM_WINDOW memoryWindow,
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				      unsigned int remapValueHigh,
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				      unsigned int remapValueLow);
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/* -------------------------------------------------------------------------------------------------*/
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/* Configurate the protection feature to a given space. */
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bool memorySetProtectRegion(MEMORY_PROTECT_WINDOW window,
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			      MEMORY_ACCESS gtMemoryAccess,
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			      MEMORY_ACCESS_WRITE gtMemoryWrite,
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			      MEMORY_CACHE_PROTECT cacheProtection,
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			      unsigned int baseAddress,
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			      unsigned int size);
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/* Configurate the protection feature to a given space. */
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/*bool memorySetProtectRegion(MEMORY_PROTECT_REGION region,
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			    MEMORY_ACCESS memoryAccess,
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			    MEMORY_ACCESS_WRITE memoryWrite,
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			    MEMORY_CACHE_PROTECT cacheProtection,
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			    unsigned int baseAddress,
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			    unsigned int regionLength); */
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/* Configurate the snoop feature to a given space. */
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bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region,
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			      MEMORY_SNOOP_TYPE snoopType,
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			      unsigned int baseAddress,
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			      unsigned int regionLength);
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bool memoryRemapAddress(unsigned int remapReg, unsigned int remapValue);
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bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum);
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bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum);
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/* Set a new base and size for one of the PCI windows. */
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bool memorySetPciWindow(PCI_MEM_WINDOW pciWindow, unsigned int pciWindowBase,
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			  unsigned int pciWindowSize);
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/* Disable or enable one of the 21 windows dedicated for the CPU's
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   address decoding mechanism */
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void MemoryDisableWindow(MEMORY_WINDOW window);
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void MemoryEnableWindow (MEMORY_WINDOW window);
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MEMORY_WINDOW_STATUS MemoryGetMemWindowStatus(MEMORY_WINDOW window);
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#endif	/* __INCmemoryh */
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