589 lines
14 KiB
Plaintext
589 lines
14 KiB
Plaintext
/*
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* Copyright 2012 DENX Software Engineering GmbH
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* Heiko Schocher <hs@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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arm {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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intc: interrupt-controller@fffee000 {
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compatible = "ti,cp-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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ti,intc-size = <101>;
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reg = <0xfffee000 0x2000>;
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};
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};
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dsp: dsp@11800000 {
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compatible = "ti,da850-dsp";
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reg = <0x11800000 0x40000>,
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<0x11e00000 0x8000>,
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<0x11f00000 0x8000>,
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<0x01c14044 0x4>,
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<0x01c14174 0x8>;
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reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
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interrupt-parent = <&intc>;
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interrupts = <28>;
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status = "disabled";
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};
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soc@1c00000 {
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compatible = "simple-bus";
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model = "da850";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x01c00000 0x400000>;
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interrupt-parent = <&intc>;
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pmx_core: pinmux@14120 {
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compatible = "pinctrl-single";
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reg = <0x14120 0x50>;
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#address-cells = <1>;
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#size-cells = <0>;
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#pinctrl-cells = <2>;
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pinctrl-single,bit-per-mux;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0xf>;
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status = "disabled";
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serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
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pinctrl-single,bits = <
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/* UART0_RTS UART0_CTS */
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0x0c 0x22000000 0xff000000
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>;
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};
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serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
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pinctrl-single,bits = <
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/* UART0_TXD UART0_RXD */
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0x0c 0x00220000 0x00ff0000
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>;
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};
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serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
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pinctrl-single,bits = <
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/* UART1_CTS UART1_RTS */
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0x00 0x00440000 0x00ff0000
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>;
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};
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serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
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pinctrl-single,bits = <
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/* UART1_TXD UART1_RXD */
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0x10 0x22000000 0xff000000
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>;
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};
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serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
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pinctrl-single,bits = <
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/* UART2_CTS UART2_RTS */
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0x00 0x44000000 0xff000000
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>;
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};
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serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
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pinctrl-single,bits = <
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/* UART2_TXD UART2_RXD */
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0x10 0x00220000 0x00ff0000
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>;
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};
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,bits = <
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/* I2C0_SDA,I2C0_SCL */
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0x10 0x00002200 0x0000ff00
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,bits = <
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/* I2C1_SDA, I2C1_SCL */
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0x10 0x00440000 0x00ff0000
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>;
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};
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mmc0_pins: pinmux_mmc_pins {
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pinctrl-single,bits = <
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/* MMCSD0_DAT[3] MMCSD0_DAT[2]
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* MMCSD0_DAT[1] MMCSD0_DAT[0]
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* MMCSD0_CMD MMCSD0_CLK
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*/
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0x28 0x00222222 0x00ffffff
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>;
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};
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ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
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pinctrl-single,bits = <
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/* EPWM0A */
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0xc 0x00000002 0x0000000f
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>;
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};
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ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
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pinctrl-single,bits = <
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/* EPWM0B */
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0xc 0x00000020 0x000000f0
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>;
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};
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ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
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pinctrl-single,bits = <
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/* EPWM1A */
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0x14 0x00000002 0x0000000f
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>;
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};
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ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
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pinctrl-single,bits = <
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/* EPWM1B */
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0x14 0x00000020 0x000000f0
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>;
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};
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ecap0_pins: pinmux_ecap0_pins {
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pinctrl-single,bits = <
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/* ECAP0_APWM0 */
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0x8 0x20000000 0xf0000000
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>;
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};
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ecap1_pins: pinmux_ecap1_pins {
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pinctrl-single,bits = <
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/* ECAP1_APWM1 */
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0x4 0x40000000 0xf0000000
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>;
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};
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ecap2_pins: pinmux_ecap2_pins {
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pinctrl-single,bits = <
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/* ECAP2_APWM2 */
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0x4 0x00000004 0x0000000f
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>;
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};
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spi0_pins: pinmux_spi0_pins {
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pinctrl-single,bits = <
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/* SIMO, SOMI, CLK */
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0xc 0x00001101 0x0000ff0f
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>;
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};
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spi0_cs0_pin: pinmux_spi0_cs0 {
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pinctrl-single,bits = <
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/* CS0 */
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0x10 0x00000010 0x000000f0
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>;
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};
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spi0_cs3_pin: pinmux_spi0_cs3_pin {
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pinctrl-single,bits = <
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/* CS3 */
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0xc 0x01000000 0x0f000000
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>;
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};
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spi1_pins: pinmux_spi1_pins {
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pinctrl-single,bits = <
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/* SIMO, SOMI, CLK */
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0x14 0x00110100 0x00ff0f00
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>;
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};
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spi1_cs0_pin: pinmux_spi1_cs0 {
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pinctrl-single,bits = <
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/* CS0 */
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0x14 0x00000010 0x000000f0
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>;
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};
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mdio_pins: pinmux_mdio_pins {
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pinctrl-single,bits = <
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/* MDIO_CLK, MDIO_D */
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0x10 0x00000088 0x000000ff
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>;
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};
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mii_pins: pinmux_mii_pins {
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pinctrl-single,bits = <
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/*
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* MII_TXEN, MII_TXCLK, MII_COL
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* MII_TXD_3, MII_TXD_2, MII_TXD_1
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* MII_TXD_0
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*/
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0x8 0x88888880 0xfffffff0
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/*
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* MII_RXER, MII_CRS, MII_RXCLK
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* MII_RXDV, MII_RXD_3, MII_RXD_2
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* MII_RXD_1, MII_RXD_0
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*/
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0xc 0x88888888 0xffffffff
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>;
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};
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lcd_pins: pinmux_lcd_pins {
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pinctrl-single,bits = <
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/*
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* LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
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* LCD_D[6], LCD_D[7]
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*/
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0x40 0x22222200 0xffffff00
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/*
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* LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
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* LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
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*/
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0x44 0x22222222 0xffffffff
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/* LCD_D[8], LCD_D[9] */
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0x48 0x00000022 0x000000ff
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/* LCD_PCLK */
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0x48 0x02000000 0x0f000000
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/* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
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0x4c 0x02000022 0x0f0000ff
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>;
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};
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vpif_capture_pins: vpif_capture_pins {
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pinctrl-single,bits = <
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/* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
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0x38 0x11111111 0xffffffff
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/* VP_DIN[10..15,0..1] */
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0x3c 0x11111111 0xffffffff
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/* VP_DIN[8..9] */
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0x40 0x00000011 0x000000ff
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>;
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};
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vpif_display_pins: vpif_display_pins {
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pinctrl-single,bits = <
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/* VP_DOUT[2..7] */
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0x40 0x11111100 0xffffff00
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/* VP_DOUT[10..15,0..1] */
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0x44 0x11111111 0xffffffff
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/* VP_DOUT[8..9] */
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0x48 0x00000011 0x000000ff
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/*
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* VP_CLKOUT3, VP_CLKIN3,
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* VP_CLKOUT2, VP_CLKIN2
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*/
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0x4c 0x00111100 0x00ffff00
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>;
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};
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};
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prictrl: priority-controller@14110 {
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compatible = "ti,da850-mstpri";
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reg = <0x14110 0x0c>;
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status = "disabled";
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};
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cfgchip: chip-controller@1417c {
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compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
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reg = <0x1417c 0x14>;
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usb_phy: usb-phy {
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compatible = "ti,da830-usb-phy";
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#phy-cells = <1>;
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status = "disabled";
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};
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};
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edma0: edma@0 {
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compatible = "ti,edma3-tpcc";
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/* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
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reg = <0x0 0x8000>;
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reg-names = "edma3_cc";
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interrupts = <11 12>;
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interrupt-names = "edma3_ccint", "edma3_ccerrint";
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#dma-cells = <2>;
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ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
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};
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edma0_tptc0: tptc@8000 {
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compatible = "ti,edma3-tptc";
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reg = <0x8000 0x400>;
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interrupts = <13>;
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interrupt-names = "edm3_tcerrint";
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};
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edma0_tptc1: tptc@8400 {
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compatible = "ti,edma3-tptc";
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reg = <0x8400 0x400>;
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interrupts = <32>;
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interrupt-names = "edm3_tcerrint";
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};
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edma1: edma@230000 {
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compatible = "ti,edma3-tpcc";
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/* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
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reg = <0x230000 0x8000>;
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reg-names = "edma3_cc";
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interrupts = <93 94>;
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interrupt-names = "edma3_ccint", "edma3_ccerrint";
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#dma-cells = <2>;
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ti,tptcs = <&edma1_tptc0 7>;
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};
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edma1_tptc0: tptc@238000 {
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compatible = "ti,edma3-tptc";
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reg = <0x238000 0x400>;
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interrupts = <95>;
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interrupt-names = "edm3_tcerrint";
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};
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serial0: serial@42000 {
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compatible = "ti,da830-uart", "ns16550a";
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reg = <0x42000 0x100>;
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reg-io-width = <4>;
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reg-shift = <2>;
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interrupts = <25>;
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status = "disabled";
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};
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serial1: serial@10c000 {
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compatible = "ti,da830-uart", "ns16550a";
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reg = <0x10c000 0x100>;
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reg-io-width = <4>;
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reg-shift = <2>;
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interrupts = <53>;
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status = "disabled";
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};
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serial2: serial@10d000 {
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compatible = "ti,da830-uart", "ns16550a";
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reg = <0x10d000 0x100>;
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reg-io-width = <4>;
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reg-shift = <2>;
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interrupts = <61>;
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status = "disabled";
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};
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rtc0: rtc@23000 {
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compatible = "ti,da830-rtc";
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reg = <0x23000 0x1000>;
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interrupts = <19
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19>;
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status = "disabled";
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};
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i2c0: i2c@22000 {
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compatible = "ti,davinci-i2c";
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reg = <0x22000 0x1000>;
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interrupts = <15>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@228000 {
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compatible = "ti,davinci-i2c";
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reg = <0x228000 0x1000>;
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interrupts = <51>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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wdt: wdt@21000 {
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compatible = "ti,davinci-wdt";
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reg = <0x21000 0x1000>;
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status = "disabled";
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};
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mmc0: mmc@40000 {
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compatible = "ti,da830-mmc";
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reg = <0x40000 0x1000>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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interrupts = <16>;
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dmas = <&edma0 16 0>, <&edma0 17 0>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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vpif: video@217000 {
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compatible = "ti,da850-vpif";
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reg = <0x217000 0x1000>;
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interrupts = <92>;
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status = "disabled";
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/* VPIF capture port */
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port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* VPIF display port */
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port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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mmc1: mmc@21b000 {
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compatible = "ti,da830-mmc";
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reg = <0x21b000 0x1000>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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interrupts = <72>;
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dmas = <&edma1 28 0>, <&edma1 29 0>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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ehrpwm0: pwm@300000 {
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compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
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"ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x300000 0x2000>;
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status = "disabled";
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};
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ehrpwm1: pwm@302000 {
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compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
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"ti,am33xx-ehrpwm";
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#pwm-cells = <3>;
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reg = <0x302000 0x2000>;
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status = "disabled";
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};
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ecap0: ecap@306000 {
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compatible = "ti,da850-ecap", "ti,am3352-ecap",
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"ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x306000 0x80>;
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status = "disabled";
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};
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ecap1: ecap@307000 {
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compatible = "ti,da850-ecap", "ti,am3352-ecap",
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"ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x307000 0x80>;
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status = "disabled";
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};
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ecap2: ecap@308000 {
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compatible = "ti,da850-ecap", "ti,am3352-ecap",
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"ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x308000 0x80>;
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status = "disabled";
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};
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spi0: spi@41000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ti,da830-spi";
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reg = <0x41000 0x1000>;
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num-cs = <6>;
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ti,davinci-spi-intr-line = <1>;
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interrupts = <20>;
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dmas = <&edma0 14 0>, <&edma0 15 0>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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spi1: spi@30e000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ti,da830-spi";
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reg = <0x30e000 0x1000>;
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num-cs = <4>;
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ti,davinci-spi-intr-line = <1>;
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interrupts = <56>;
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dmas = <&edma0 18 0>, <&edma0 19 0>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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usb0: usb@200000 {
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compatible = "ti,da830-musb";
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reg = <0x200000 0x1000>;
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ranges;
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interrupts = <58>;
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interrupt-names = "mc";
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dr_mode = "otg";
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phys = <&usb_phy 0>;
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phy-names = "usb-phy";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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dmas = <&cppi41dma 0 0 &cppi41dma 1 0
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&cppi41dma 2 0 &cppi41dma 3 0
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&cppi41dma 0 1 &cppi41dma 1 1
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&cppi41dma 2 1 &cppi41dma 3 1>;
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dma-names =
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"rx1", "rx2", "rx3", "rx4",
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"tx1", "tx2", "tx3", "tx4";
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cppi41dma: dma-controller@201000 {
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compatible = "ti,da830-cppi41";
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reg = <0x201000 0x1000
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0x202000 0x1000
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0x204000 0x4000>;
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reg-names = "controller",
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"scheduler", "queuemgr";
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interrupts = <58>;
|
|
#dma-cells = <2>;
|
|
#dma-channels = <4>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
sata: sata@218000 {
|
|
compatible = "ti,da850-ahci";
|
|
reg = <0x218000 0x2000>, <0x22c018 0x4>;
|
|
interrupts = <67>;
|
|
status = "disabled";
|
|
};
|
|
mdio: mdio@224000 {
|
|
compatible = "ti,davinci_mdio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x224000 0x1000>;
|
|
status = "disabled";
|
|
};
|
|
eth0: ethernet@220000 {
|
|
compatible = "ti,davinci-dm6467-emac";
|
|
reg = <0x220000 0x4000>;
|
|
ti,davinci-ctrl-reg-offset = <0x3000>;
|
|
ti,davinci-ctrl-mod-reg-offset = <0x2000>;
|
|
ti,davinci-ctrl-ram-offset = <0>;
|
|
ti,davinci-ctrl-ram-size = <0x2000>;
|
|
local-mac-address = [ 00 00 00 00 00 00 ];
|
|
interrupts = <33
|
|
34
|
|
35
|
|
36
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
usb1: usb@225000 {
|
|
compatible = "ti,da830-ohci";
|
|
reg = <0x225000 0x1000>;
|
|
interrupts = <59>;
|
|
phys = <&usb_phy 1>;
|
|
phy-names = "usb-phy";
|
|
status = "disabled";
|
|
};
|
|
gpio: gpio@226000 {
|
|
compatible = "ti,dm6441-gpio";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x226000 0x1000>;
|
|
interrupts = <42 IRQ_TYPE_EDGE_BOTH
|
|
43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
|
|
45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
|
|
47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
|
|
49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
|
|
ti,ngpio = <144>;
|
|
ti,davinci-gpio-unbanked = <0>;
|
|
status = "disabled";
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
pinconf: pin-controller@22c00c {
|
|
compatible = "ti,da850-pupd";
|
|
reg = <0x22c00c 0x8>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mcasp0: mcasp@100000 {
|
|
compatible = "ti,da830-mcasp-audio";
|
|
reg = <0x100000 0x2000>,
|
|
<0x102000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <54>;
|
|
interrupt-names = "common";
|
|
status = "disabled";
|
|
dmas = <&edma0 1 1>,
|
|
<&edma0 0 1>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
lcdc: display@213000 {
|
|
compatible = "ti,da850-tilcdc";
|
|
reg = <0x213000 0x1000>;
|
|
interrupts = <52>;
|
|
max-pixelclock = <37500>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
aemif: aemif@68000000 {
|
|
compatible = "ti,da850-aemif";
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
|
|
reg = <0x68000000 0x00008000>;
|
|
ranges = <0 0 0x60000000 0x08000000
|
|
1 0 0x68000000 0x00008000>;
|
|
status = "disabled";
|
|
};
|
|
memctrl: memory-controller@b0000000 {
|
|
compatible = "ti,da850-ddr-controller";
|
|
reg = <0xb0000000 0xe8>;
|
|
status = "disabled";
|
|
};
|
|
};
|