98 lines
1.8 KiB
Plaintext
98 lines
1.8 KiB
Plaintext
/dts-v1/;
|
|
/ {
|
|
compatible = "riscv32 nx25";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&intc>;
|
|
|
|
aliases {
|
|
uart0 = &serial0;
|
|
ethernet0 = &mac0;
|
|
spi0 = &spi;
|
|
} ;
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7";
|
|
stdout-path = "uart0:38400n8";
|
|
tick-timer = &timer0;
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x40000000>;
|
|
};
|
|
|
|
spiclk: virt_100mhz {
|
|
#clock-cells = <0>;
|
|
compatible = "fixed-clock";
|
|
clock-frequency = <100000000>;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
cpu@0 {
|
|
compatible = "andestech,n13";
|
|
reg = <0>;
|
|
/* FIXME: to fill correct frqeuency */
|
|
clock-frequency = <60000000>;
|
|
};
|
|
};
|
|
|
|
intc: interrupt-controller {
|
|
compatible = "andestech,atnointc010";
|
|
#interrupt-cells = <1>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
serial0: serial@f0300000 {
|
|
compatible = "andestech,uart16550", "ns16550a";
|
|
reg = <0xf0300000 0x1000>;
|
|
interrupts = <7 4>;
|
|
clock-frequency = <19660800>;
|
|
reg-shift = <2>;
|
|
reg-offset = <32>;
|
|
no-loopback-test = <1>;
|
|
};
|
|
|
|
timer0: timer@f0400000 {
|
|
compatible = "andestech,atcpit100";
|
|
reg = <0xf0400000 0x1000>;
|
|
interrupts = <2 4>;
|
|
clock-frequency = <40000000>;
|
|
};
|
|
|
|
mac0: mac@e0100000 {
|
|
compatible = "andestech,atmac100";
|
|
reg = <0xe0100000 0x1000>;
|
|
interrupts = <25 4>;
|
|
};
|
|
|
|
mmc0: mmc@f0e00000 {
|
|
compatible = "andestech,atsdc010";
|
|
max-frequency = <100000000>;
|
|
fifo-depth = <0x10>;
|
|
reg = <0xf0e00000 0x1000>;
|
|
interrupts = <17 4>;
|
|
cap-sd-highspeed;
|
|
};
|
|
|
|
spi: spi@f0b00000 {
|
|
compatible = "andestech,atcspi200";
|
|
reg = <0xf0b00000 0x1000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
num-cs = <1>;
|
|
clocks = <&spiclk>;
|
|
interrupts = <3 4>;
|
|
flash@0 {
|
|
compatible = "spi-flash";
|
|
spi-max-frequency = <50000000>;
|
|
reg = <0>;
|
|
spi-cpol;
|
|
spi-cpha;
|
|
};
|
|
};
|
|
|
|
};
|