747778cf69
The maximum SD clock frequency in High Speed mode is 50 MHz. This change makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1) instead of the previous 33.25 MHz from the AHB clock (133 MHz / 2 / 2). Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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| .. | ||
| Kconfig | ||
| MAINTAINERS | ||
| Makefile | ||
| imximage.cfg | ||
| mx25pdk.c | ||