79 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			79 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * Copyright 2014 Freescale Semiconductor, Inc.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef __DDR_H__
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| #define __DDR_H__
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| struct board_specific_parameters {
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| 	u32 n_ranks;
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| 	u32 datarate_mhz_high;
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| 	u32 rank_gb;
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| 	u32 clk_adjust;
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| 	u32 wrlvl_start;
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| 	u32 wrlvl_ctl_2;
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| 	u32 wrlvl_ctl_3;
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| };
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| 
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| /*
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|  * These tables contain all valid speeds we want to override with board
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|  * specific parameters. datarate_mhz_high values need to be in ascending order
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|  * for each n_ranks group.
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|  */
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| static const struct board_specific_parameters udimm0[] = {
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| 	/*
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| 	 * memory controller 0
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| 	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl
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| 	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3
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| 	 */
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| 	{2,  1350, 4,  8,     8, 0x0809090b, 0x0c0c0d0a},
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| 	{2,  1350, 0, 10,     7, 0x0709090b, 0x0c0c0d09},
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| 	{2,  1666, 4,  8,     8, 0x080a0a0d, 0x0d10100b},
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| 	{2,  1666, 0, 10,     7, 0x080a0a0c, 0x0d0d0e0a},
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| 	{2,  1900, 0,  8,     8, 0x090a0b0e, 0x0f11120c},
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| 	{2,  2140, 0,  8,     8, 0x090a0b0e, 0x0f11120c},
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| 	{1,  1350, 0, 10,     8, 0x0809090b, 0x0c0c0d0a},
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| 	{1,  1700, 0, 10,     8, 0x080a0a0c, 0x0c0d0e0a},
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| 	{1,  1900, 0,  8,     8, 0x080a0a0c, 0x0e0e0f0a},
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| 	{1,  2140, 0,  8,     8, 0x090a0b0c, 0x0e0f100b},
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| 	{}
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| };
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| 
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| static const struct board_specific_parameters rdimm0[] = {
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| 	/*
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| 	 * memory controller 0
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| 	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl
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| 	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3
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| 	 */
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| 	{4,  1350, 0, 10,     9, 0x08070605, 0x06070806},
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| 	{4,  1666, 0, 10,    11, 0x0a080706, 0x07090906},
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| 	{4,  2140, 0, 10,    12, 0x0b090807, 0x080a0b07},
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| 	{2,  1350, 0, 10,     9, 0x08070605, 0x06070806},
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| 	{2,  1666, 0, 10,    11, 0x0a090806, 0x08090a06},
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| 	{2,  2140, 0, 10,    12, 0x0b090807, 0x080a0b07},
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| 	{1,  1350, 0, 10,     9, 0x08070605, 0x06070806},
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| 	{1,  1666, 0, 10,    11, 0x0a090806, 0x08090a06},
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| 	{1,  2140, 0,  8,    12, 0x0b090807, 0x080a0b07},
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| 	{}
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| };
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| 
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| /*
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|  * The three slots have slightly different timing. The center values are good
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|  * for all slots. We use identical speed tables for them. In future use, if
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|  * DIMMs require separated tables, make more entries as needed.
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|  */
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| static const struct board_specific_parameters *udimms[] = {
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| 	udimm0,
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| };
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| 
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| /*
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|  * The three slots have slightly different timing. See comments above.
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|  */
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| static const struct board_specific_parameters *rdimms[] = {
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| 	rdimm0,
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| };
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| 
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| 
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| #endif
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