199 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			199 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2013 ADVANSEE
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|  * Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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|  *
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|  * Based on Dirk Behme's
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|  * https://github.com/dirkbehme/u-boot-imx6/blob/28b17e9/drivers/misc/imx_otp.c,
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|  * which is based on Freescale's
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|  * http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6,
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|  * which is:
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|  * Copyright (C) 2011 Freescale Semiconductor, Inc.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <fuse.h>
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| #include <asm/errno.h>
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| #include <asm/io.h>
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| #include <asm/arch/clock.h>
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| #include <asm/arch/imx-regs.h>
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| 
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| #define BO_CTRL_WR_UNLOCK		16
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| #define BM_CTRL_WR_UNLOCK		0xffff0000
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| #define BV_CTRL_WR_UNLOCK_KEY		0x3e77
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| #define BM_CTRL_ERROR			0x00000200
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| #define BM_CTRL_BUSY			0x00000100
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| #define BO_CTRL_ADDR			0
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| #define BM_CTRL_ADDR			0x0000007f
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| 
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| #define BO_TIMING_STROBE_READ		16
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| #define BM_TIMING_STROBE_READ		0x003f0000
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| #define BV_TIMING_STROBE_READ_NS	37
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| #define BO_TIMING_RELAX			12
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| #define BM_TIMING_RELAX			0x0000f000
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| #define BV_TIMING_RELAX_NS		17
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| #define BO_TIMING_STROBE_PROG		0
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| #define BM_TIMING_STROBE_PROG		0x00000fff
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| #define BV_TIMING_STROBE_PROG_US	10
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| 
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| #define BM_READ_CTRL_READ_FUSE		0x00000001
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| 
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| #define BF(value, field)		(((value) << BO_##field) & BM_##field)
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| 
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| #define WRITE_POSTAMBLE_US		2
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| 
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| static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us)
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| {
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| 	while (readl(®s->ctrl) & BM_CTRL_BUSY)
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| 		udelay(delay_us);
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| }
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| 
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| static void clear_error(struct ocotp_regs *regs)
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| {
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| 	writel(BM_CTRL_ERROR, ®s->ctrl_clr);
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| }
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| 
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| static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word,
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| 				int assert, const char *caller)
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| {
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| 	*regs = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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| 
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| 	if (bank >= ARRAY_SIZE((*regs)->bank) ||
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| 			word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 ||
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| 			!assert) {
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| 		printf("mxc_ocotp %s(): Invalid argument\n", caller);
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| 		return -EINVAL;
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| 	}
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| 
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| 	enable_ocotp_clk(1);
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| 
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| 	wait_busy(*regs, 1);
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| 	clear_error(*regs);
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| 
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| 	return 0;
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| }
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| 
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| static int finish_access(struct ocotp_regs *regs, const char *caller)
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| {
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| 	u32 err;
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| 
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| 	err = !!(readl(®s->ctrl) & BM_CTRL_ERROR);
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| 	clear_error(regs);
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| 
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| 	if (err) {
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| 		printf("mxc_ocotp %s(): Access protect error\n", caller);
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| 		return -EIO;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int prepare_read(struct ocotp_regs **regs, u32 bank, u32 word, u32 *val,
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| 			const char *caller)
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| {
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| 	return prepare_access(regs, bank, word, val != NULL, caller);
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| }
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| 
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| int fuse_read(u32 bank, u32 word, u32 *val)
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| {
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| 	struct ocotp_regs *regs;
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| 	int ret;
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| 
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| 	ret = prepare_read(®s, bank, word, val, __func__);
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| 	if (ret)
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| 		return ret;
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| 
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| 	*val = readl(®s->bank[bank].fuse_regs[word << 2]);
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| 
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| 	return finish_access(regs, __func__);
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| }
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| 
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| static void set_timing(struct ocotp_regs *regs)
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| {
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| 	u32 ipg_clk;
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| 	u32 relax, strobe_read, strobe_prog;
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| 	u32 timing;
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| 
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| 	ipg_clk = mxc_get_clock(MXC_IPG_CLK);
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| 
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| 	relax = DIV_ROUND_UP(ipg_clk * BV_TIMING_RELAX_NS, 1000000000) - 1;
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| 	strobe_read = DIV_ROUND_UP(ipg_clk * BV_TIMING_STROBE_READ_NS,
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| 					1000000000) + 2 * (relax + 1) - 1;
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| 	strobe_prog = DIV_ROUND_CLOSEST(ipg_clk * BV_TIMING_STROBE_PROG_US,
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| 						1000000) + 2 * (relax + 1) - 1;
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| 
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| 	timing = BF(strobe_read, TIMING_STROBE_READ) |
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| 			BF(relax, TIMING_RELAX) |
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| 			BF(strobe_prog, TIMING_STROBE_PROG);
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| 
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| 	clrsetbits_le32(®s->timing, BM_TIMING_STROBE_READ | BM_TIMING_RELAX |
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| 			BM_TIMING_STROBE_PROG, timing);
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| }
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| 
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| static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word,
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| 				int write)
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| {
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| 	u32 wr_unlock = write ? BV_CTRL_WR_UNLOCK_KEY : 0;
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| 	u32 addr = bank << 3 | word;
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| 
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| 	set_timing(regs);
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| 	clrsetbits_le32(®s->ctrl, BM_CTRL_WR_UNLOCK | BM_CTRL_ADDR,
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| 			BF(wr_unlock, CTRL_WR_UNLOCK) |
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| 			BF(addr, CTRL_ADDR));
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| }
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| 
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| int fuse_sense(u32 bank, u32 word, u32 *val)
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| {
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| 	struct ocotp_regs *regs;
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| 	int ret;
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| 
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| 	ret = prepare_read(®s, bank, word, val, __func__);
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| 	if (ret)
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| 		return ret;
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| 
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| 	setup_direct_access(regs, bank, word, false);
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| 	writel(BM_READ_CTRL_READ_FUSE, ®s->read_ctrl);
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| 	wait_busy(regs, 1);
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| 	*val = readl(®s->read_fuse_data);
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| 
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| 	return finish_access(regs, __func__);
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| }
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| 
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| static int prepare_write(struct ocotp_regs **regs, u32 bank, u32 word,
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| 				const char *caller)
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| {
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| 	return prepare_access(regs, bank, word, true, caller);
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| }
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| 
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| int fuse_prog(u32 bank, u32 word, u32 val)
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| {
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| 	struct ocotp_regs *regs;
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| 	int ret;
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| 
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| 	ret = prepare_write(®s, bank, word, __func__);
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| 	if (ret)
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| 		return ret;
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| 
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| 	setup_direct_access(regs, bank, word, true);
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| 	writel(val, ®s->data);
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| 	wait_busy(regs, BV_TIMING_STROBE_PROG_US);
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| 	udelay(WRITE_POSTAMBLE_US);
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| 
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| 	return finish_access(regs, __func__);
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| }
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| 
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| int fuse_override(u32 bank, u32 word, u32 val)
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| {
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| 	struct ocotp_regs *regs;
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| 	int ret;
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| 
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| 	ret = prepare_write(®s, bank, word, __func__);
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| 	if (ret)
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| 		return ret;
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| 
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| 	writel(val, ®s->bank[bank].fuse_regs[word << 2]);
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| 
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| 	return finish_access(regs, __func__);
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| }
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