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Anatolij Gustschin a615dfda8c mpc512x: Adjust the DRAM init sequence to the datasheet spec 
Do maintain a 200 usecs period of stable power and clock before
asserting the CKE signal and sending commands, have at least 200
DRAM clock cycles pass after initialization before data access.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
 		2013-03-09 08:23:02 +01:00
..
cpu mpc512x: Adjust the DRAM init sequence to the datasheet spec 2013-03-09 08:23:02 +01:00
include/asm mpc512x: Adjust the DRAM init sequence to the datasheet spec 2013-03-09 08:23:02 +01:00
lib Clean up libfdt.h includes 2013-02-08 22:32:38 -05:00
config.mk powerpc: change .fixup test to a GCC version test 2012-11-26 15:41:22 -06:00