283 lines
		
	
	
		
			7.1 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			283 lines
		
	
	
		
			7.1 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * serial.h - common serial defines for early debug and serial driver.
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|  *            any functions defined here must be always_inline since
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|  *            initcode cannot have function calls.
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|  *
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|  * Copyright (c) 2004-2007 Analog Devices Inc.
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|  *
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|  * Licensed under the GPL-2 or later.
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|  */
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| 
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| #ifndef __BFIN_CPU_SERIAL_H__
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| #define __BFIN_CPU_SERIAL_H__
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| 
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| #include <asm/blackfin.h>
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| #include <asm/mach-common/bits/uart.h>
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| 
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| #ifndef CONFIG_UART_CONSOLE
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| # define CONFIG_UART_CONSOLE 0
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| #endif
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| 
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| #ifdef CONFIG_DEBUG_EARLY_SERIAL
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| # define BFIN_DEBUG_EARLY_SERIAL 1
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| #else
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| # define BFIN_DEBUG_EARLY_SERIAL 0
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| #endif
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| 
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| #ifndef __ASSEMBLY__
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| 
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| #include <asm/portmux.h>
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| 
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| #define LOB(x) ((x) & 0xFF)
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| #define HIB(x) (((x) >> 8) & 0xFF)
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| 
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| /*
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|  * All Blackfin system MMRs are padded to 32bits even if the register
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|  * itself is only 16bits.  So use a helper macro to streamline this.
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|  */
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| #define __BFP(m) u16 m; u16 __pad_##m
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| struct bfin_mmr_serial {
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| #ifdef __ADSPBF54x__
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| 	__BFP(dll);
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| 	__BFP(dlh);
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| 	__BFP(gctl);
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| 	__BFP(lcr);
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| 	__BFP(mcr);
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| 	__BFP(lsr);
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| 	__BFP(msr);
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| 	__BFP(scr);
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| 	__BFP(ier_set);
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| 	__BFP(ier_clear);
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| 	__BFP(thr);
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| 	__BFP(rbr);
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| #else
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| 	union {
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| 		u16 dll;
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| 		u16 thr;
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| 		const u16 rbr;
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| 	};
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| 	const u16 __spad0;
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| 	union {
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| 		u16 dlh;
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| 		u16 ier;
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| 	};
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| 	const u16 __spad1;
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| 	const __BFP(iir);
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| 	__BFP(lcr);
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| 	__BFP(mcr);
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| 	__BFP(lsr);
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| 	__BFP(msr);
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| 	__BFP(scr);
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| 	const u32 __spad2;
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| 	__BFP(gctl);
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| #endif
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| };
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| #undef __BFP
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| 
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| #ifndef UART_LSR
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| # if (CONFIG_UART_CONSOLE == 3)
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| #  define UART_BASE UART3_DLL
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| # elif (CONFIG_UART_CONSOLE == 2)
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| #  define UART_BASE UART2_DLL
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| # elif (CONFIG_UART_CONSOLE == 1)
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| #  define UART_BASE UART1_DLL
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| # elif (CONFIG_UART_CONSOLE == 0)
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| #  define UART_BASE UART0_DLL
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| # endif
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| #else
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| # if CONFIG_UART_CONSOLE != 0
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| #  error CONFIG_UART_CONSOLE must be 0 on parts with only one UART
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| # endif
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| # define UART_BASE UART_DLL
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| #endif
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| #define pUART ((volatile struct bfin_mmr_serial *)UART_BASE)
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| 
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| #ifdef __ADSPBF54x__
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| # define ACCESS_LATCH()
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| # define ACCESS_PORT_IER()
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| #else
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| # define ACCESS_LATCH() \
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| 	bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) | DLAB)
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| # define ACCESS_PORT_IER() \
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| 	bfin_write16(&pUART->lcr, bfin_read16(&pUART->lcr) & ~DLAB)
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| #endif
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| 
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| __attribute__((always_inline))
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| static inline void serial_do_portmux(void)
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| {
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| 	if (!BFIN_DEBUG_EARLY_SERIAL) {
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| 		const unsigned short pins[] = {
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| #if CONFIG_UART_CONSOLE == 0
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| 			P_UART0_TX, P_UART0_RX,
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| #elif CONFIG_UART_CONSOLE == 1
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| 			P_UART1_TX, P_UART1_RX,
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| #elif CONFIG_UART_CONSOLE == 2
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| 			P_UART2_TX, P_UART2_RX,
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| #elif CONFIG_UART_CONSOLE == 3
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| 			P_UART3_TX, P_UART3_RX,
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| #endif
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| 			0,
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| 		};
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| 		peripheral_request_list(pins, "bfin-uart");
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| 		return;
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| 	}
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| 
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| #if defined(__ADSPBF51x__)
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| # define DO_MUX(port, mux_tx, mux_rx, tx, rx) \
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| 	bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##mux_tx##_MASK | PORT_x_MUX_##mux_rx##_MASK)) | PORT_x_MUX_##mux_tx##_FUNC_2 | PORT_x_MUX_##mux_rx##_FUNC_2); \
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| 	bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
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| 	switch (CONFIG_UART_CONSOLE) {
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| 	case 0: DO_MUX(G, 5, 5, 9, 10);  break;	/* Port G; mux 5; PG9 and PG10 */
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| 	case 1: DO_MUX(F, 2, 3, 14, 15); break;	/* Port H; mux 2/3; PH14 and PH15 */
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| 	}
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| 	SSYNC();
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| #elif defined(__ADSPBF52x__)
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| # define DO_MUX(port, mux, tx, rx) \
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| 	bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~PORT_x_MUX_##mux##_MASK) | PORT_x_MUX_##mux##_FUNC_3); \
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| 	bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
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| 	switch (CONFIG_UART_CONSOLE) {
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| 	case 0: DO_MUX(G, 2, 7, 8);   break;	/* Port G; mux 2; PG2 and PG8 */
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| 	case 1: DO_MUX(F, 5, 14, 15); break;	/* Port F; mux 5; PF14 and PF15 */
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| 	}
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| 	SSYNC();
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| #elif defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__)
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| # define DO_MUX(func, tx, rx) \
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| 	bfin_write_PORT_MUX(bfin_read_PORT_MUX() & ~(func)); \
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| 	bfin_write_PORTF_FER(bfin_read_PORTF_FER() | PF##tx | PF##rx);
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| 	switch (CONFIG_UART_CONSOLE) {
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| 	case 0: DO_MUX(PFDE, 0, 1); break;
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| 	case 1: DO_MUX(PFTE, 2, 3); break;
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| 	}
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| 	SSYNC();
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| #elif defined(__ADSPBF54x__)
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| # define DO_MUX(port, tx, rx) \
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| 	bfin_write_PORT##port##_MUX((bfin_read_PORT##port##_MUX() & ~(PORT_x_MUX_##tx##_MASK | PORT_x_MUX_##rx##_MASK)) | PORT_x_MUX_##tx##_FUNC_1 | PORT_x_MUX_##rx##_FUNC_1); \
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| 	bfin_write_PORT##port##_FER(bfin_read_PORT##port##_FER() | P##port##tx | P##port##rx);
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| 	switch (CONFIG_UART_CONSOLE) {
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| 	case 0: DO_MUX(E, 7, 8); break;	/* Port E; PE7 and PE8 */
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| 	case 1: DO_MUX(H, 0, 1); break;	/* Port H; PH0 and PH1 */
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| 	case 2: DO_MUX(B, 4, 5); break;	/* Port B; PB4 and PB5 */
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| 	case 3: DO_MUX(B, 6, 7); break;	/* Port B; PB6 and PB7 */
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| 	}
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| 	SSYNC();
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| #endif
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| }
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| 
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| __attribute__((always_inline))
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| static inline void serial_early_init(void)
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| {
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| 	/* handle portmux crap on different Blackfins */
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| 	serial_do_portmux();
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| 
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| 	/* always enable UART -- avoids anomalies 05000309 and 05000350 */
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| 	bfin_write16(&pUART->gctl, UCEN);
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| 
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| 	/* Set LCR to Word Lengh 8-bit word select */
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| 	bfin_write16(&pUART->lcr, WLS_8);
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| 
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| 	SSYNC();
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| }
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| 
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| __attribute__((always_inline))
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| static inline void serial_early_put_div(uint16_t divisor)
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| {
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| 	/* Set DLAB in LCR to Access DLL and DLH */
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| 	ACCESS_LATCH();
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| 	SSYNC();
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| 
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| 	/* Program the divisor to get the baud rate we want */
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| 	bfin_write16(&pUART->dll, LOB(divisor));
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| 	bfin_write16(&pUART->dlh, HIB(divisor));
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| 	SSYNC();
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| 
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| 	/* Clear DLAB in LCR to Access THR RBR IER */
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| 	ACCESS_PORT_IER();
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| 	SSYNC();
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| }
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| 
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| __attribute__((always_inline))
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| static inline uint16_t serial_early_get_div(void)
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| {
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| 	/* Set DLAB in LCR to Access DLL and DLH */
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| 	ACCESS_LATCH();
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| 	SSYNC();
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| 
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| 	uint8_t dll = bfin_read16(&pUART->dll);
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| 	uint8_t dlh = bfin_read16(&pUART->dlh);
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| 	uint16_t divisor = (dlh << 8) | dll;
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| 
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| 	/* Clear DLAB in LCR to Access THR RBR IER */
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| 	ACCESS_PORT_IER();
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| 	SSYNC();
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| 
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| 	return divisor;
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| }
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| 
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| /* We cannot use get_sclk() early on as it uses caches in external memory */
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| #if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL)
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| # define get_sclk() (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV)
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| #endif
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| 
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| __attribute__((always_inline))
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| static inline void serial_early_set_baud(uint32_t baud)
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| {
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| 	/* Translate from baud into divisor in terms of SCLK.  The
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| 	 * weird multiplication is to make sure we over sample just
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| 	 * a little rather than under sample the incoming signals.
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| 	 */
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| 	serial_early_put_div((get_sclk() + (baud * 8)) / (baud * 16) - ANOMALY_05000230);
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| }
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| 
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| #ifndef BFIN_IN_INITCODE
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| __attribute__((always_inline))
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| static inline void serial_early_puts(const char *s)
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| {
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| 	if (BFIN_DEBUG_EARLY_SERIAL) {
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| 		serial_puts("Early: ");
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| 		serial_puts(s);
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| 	}
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| }
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| #endif
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| 
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| #else
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| 
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| .macro serial_early_init
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| #ifdef CONFIG_DEBUG_EARLY_SERIAL
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| 	call _serial_initialize;
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| #endif
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| .endm
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| 
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| .macro serial_early_set_baud
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| #ifdef CONFIG_DEBUG_EARLY_SERIAL
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| 	R0.L = LO(CONFIG_BAUDRATE);
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| 	R0.H = HI(CONFIG_BAUDRATE);
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| 	call _serial_set_baud;
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| #endif
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| .endm
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| 
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| /* Since we embed the string right into our .text section, we need
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|  * to find its address.  We do this by getting our PC and adding 2
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|  * bytes (which is the length of the jump instruction).  Then we
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|  * pass this address to serial_puts().
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|  */
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| #ifdef CONFIG_DEBUG_EARLY_SERIAL
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| # define serial_early_puts(str) \
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| 	call _get_pc; \
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| 	jump 1f; \
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| 	.ascii "Early:"; \
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| 	.ascii __FILE__; \
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| 	.ascii ": "; \
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| 	.ascii str; \
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| 	.asciz "\n"; \
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| 	.align 4; \
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| 1: \
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| 	R0 += 2; \
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| 	call _serial_puts;
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| #else
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| # define serial_early_puts(str)
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| #endif
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| 
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| #endif
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| 
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| #endif
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