127 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			127 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2002
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|  * Lineo, Inc <www.lineo.com>
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|  * Bernhard Kuhn <bkuhn@lineo.com>
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|  *
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Marius Groeger <mgroeger@sysgo.de>
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|  *
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Alex Zuepke <azu@sysgo.de>
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|  *
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|  * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation; either version 2 of the License, or
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|  * (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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|  *
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|  */
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| 
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| #include <common.h>
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| 
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| #ifndef CONFIG_AT91_LEGACY
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| #include <asm/io.h>
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| #include <asm/arch/hardware.h>
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| #define CONFIG_AT91_LEGACY
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| #include <asm/arch-at91rm9200/AT91RM9200.h>
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| #warning Please update to use C structur SoC access !
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| #else
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| #include <asm/arch/AT91RM9200.h>
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| #endif
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| #if !defined(CONFIG_DBGU) && !defined(CONFIG_USART0) && !defined(CONFIG_USART1)
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| #error must define one of CONFIG_DBGU or CONFIG_USART0 or CONFIG_USART1
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| #endif
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| 
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| /* ggi thunder */
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| #ifdef CONFIG_DBGU
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| AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;
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| #endif
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| #ifdef CONFIG_USART0
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| AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US0;
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| #endif
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| #ifdef CONFIG_USART1
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| AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US1;
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| #endif
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| 
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| void serial_setbrg (void)
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| {
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| 	int baudrate;
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| 
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| 	if ((baudrate = gd->baudrate) <= 0)
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| 		baudrate = CONFIG_BAUDRATE;
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| 	/* MASTER_CLOCK/(16 * baudrate) */
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| 	us->US_BRGR = (AT91C_MASTER_CLOCK >> 4) / (unsigned)baudrate;
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| }
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| 
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| int serial_init (void)
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| {
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| 	/* make any port initializations specific to this port */
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| #ifdef CONFIG_DBGU
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| 	*AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD;	/* PA 31 & 30 */
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| 	*AT91C_PMC_PCER = 1 << AT91C_ID_SYS;	/* enable clock */
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| #endif
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| #ifdef CONFIG_USART0
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| 	*AT91C_PIOA_PDR = AT91C_PA17_TXD0 | AT91C_PA18_RXD0;
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| 	*AT91C_PMC_PCER |= 1 << AT91C_ID_USART0;	/* enable clock */
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| #endif
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| #ifdef CONFIG_USART1
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| 	*AT91C_PIOB_PDR = AT91C_PB21_TXD1 | AT91C_PB20_RXD1;
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| 	*AT91C_PMC_PCER |= 1 << AT91C_ID_USART1;	/* enable clock */
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| #endif
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| 	serial_setbrg ();
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| 
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| 	us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
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| 	us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
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| 	us->US_MR =
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| 		(AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS |
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| 		 AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT);
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| 	us->US_IMR = ~0ul;
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| 	return (0);
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| }
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| 
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| void serial_exit (void)
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| {
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| 	us->US_CR = (AT91C_US_RSTRX | AT91C_US_RSTTX);
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| }
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| 
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| void serial_putc (const char c)
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| {
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| 	if (c == '\n')
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| 		serial_putc ('\r');
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| 	while ((us->US_CSR & AT91C_US_TXRDY) == 0);
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| 	us->US_THR = c;
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| }
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| 
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| void serial_puts (const char *s)
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| {
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| 	while (*s) {
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| 		serial_putc (*s++);
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| 	}
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| }
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| 
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| int serial_getc (void)
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| {
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| 	while ((us->US_CSR & AT91C_US_RXRDY) == 0);
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| 	return us->US_RHR;
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| }
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| 
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| int serial_tstc (void)
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| {
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| 	return ((us->US_CSR & AT91C_US_RXRDY) == AT91C_US_RXRDY);
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| }
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