543 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			543 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
/*
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 * (C) Copyright 2004
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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 *
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 * (C) Copyright 2001
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 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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 *
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 * (C) Copyright 2001
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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 *
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 * See file CREDITS for list of people who contributed to this
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 * project.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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#undef DEBUG
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#include <common.h>
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#include <mpc8xx.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
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#define CFG_OR_TIMING_FLASH_AT_50MHZ (OR_ACS_DIV1  | OR_TRLX | OR_CSNT_SAM | \
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				      OR_SCY_2_CLK | OR_EHTR | OR_BI)
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#endif
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips    */
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#if defined(CFG_ENV_IS_IN_FLASH)
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# ifndef  CFG_ENV_ADDR
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#  define CFG_ENV_ADDR	(CFG_FLASH_BASE + CFG_ENV_OFFSET)
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# endif
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# ifndef  CFG_ENV_SIZE
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#  define CFG_ENV_SIZE	CFG_ENV_SECT_SIZE
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# endif
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# ifndef  CFG_ENV_SECT_SIZE
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#  define CFG_ENV_SECT_SIZE  CFG_ENV_SIZE
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# endif
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#endif
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/*-----------------------------------------------------------------------
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 * Protection Flags:
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 */
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#define FLAG_PROTECT_SET	0x01
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#define FLAG_PROTECT_CLEAR	0x02
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/* Board support for 1 or 2 flash devices */
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#undef FLASH_PORT_WIDTH32
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#undef FLASH_PORT_WIDTH16
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#define FLASH_PORT_WIDTH8
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#ifdef FLASH_PORT_WIDTH16
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#define FLASH_PORT_WIDTH	ushort
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#define FLASH_PORT_WIDTHV	vu_short
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#elif FLASH_PORT_WIDTH32
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#define FLASH_PORT_WIDTH	ulong
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#define FLASH_PORT_WIDTHV	vu_long
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#else /* FLASH_PORT_WIDTH8 */
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#define FLASH_PORT_WIDTH	uchar
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#define FLASH_PORT_WIDTHV	vu_char
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#endif
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#define FPW			FLASH_PORT_WIDTH
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#define FPWV			FLASH_PORT_WIDTHV
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/*-----------------------------------------------------------------------
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 * Functions
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 */
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static ulong flash_get_size (FPWV * addr, flash_info_t * info);
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static int write_data (flash_info_t * info, ulong dest, FPW data);
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static void flash_get_offsets (ulong base, flash_info_t * info);
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/*-----------------------------------------------------------------------
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 */
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unsigned long flash_init (void)
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{
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	volatile immap_t *immap = (immap_t *) CFG_IMMR;
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	volatile memctl8xx_t *memctl = &immap->im_memctl;
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	unsigned long size_b0;
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	int i;
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#ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
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	int scy, trlx, flash_or_timing, clk_diff;
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	scy = (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_SCY_MSK) >> 4;
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	if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
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		trlx = OR_TRLX;
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		scy *= 2;
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	} else
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		trlx = 0;
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		/* We assume that each 10MHz of bus clock require 1-clk SCY
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		 * adjustment.
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		 */
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	clk_diff = (gd->bus_clk / 1000000) - 50;
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		/* We need proper rounding here. This is what the "+5" and "-5"
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		 * are here for.
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		 */
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	if (clk_diff >= 0)
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		scy += (clk_diff + 5) / 10;
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	else
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		scy += (clk_diff - 5) / 10;
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		/* For bus frequencies above 50MHz, we want to use relaxed
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		 * timing (OR_TRLX).
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		 */
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	if (gd->bus_clk >= 50000000)
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		trlx = OR_TRLX;
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	else
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		trlx = 0;
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	if (trlx)
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		scy /= 2;
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	if (scy > 0xf)
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		scy = 0xf;
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	if (scy < 1)
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		scy = 1;
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	flash_or_timing = (scy << 4) | trlx |
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			  (CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
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#endif
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	/* Init: no FLASHes known */
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	for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
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		flash_info[i].flash_id = FLASH_UNKNOWN;
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	}
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	/* Static FLASH Bank configuration here - FIXME XXX */
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	size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]);
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	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
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		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
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			size_b0, size_b0 << 20);
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	}
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	/* Remap FLASH according to real size */
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#ifndef CFG_OR_TIMING_FLASH_AT_50MHZ
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	memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
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#else
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	memctl->memc_or0 = flash_or_timing | (-size_b0 & OR_AM_MSK);
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#endif
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	memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_8 | BR_MS_GPCM | BR_V;
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	/* Re-do sizing to get full correct info */
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	size_b0 = flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[0]);
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	flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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	/* monitor protection ON by default */
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	(void) flash_protect (FLAG_PROTECT_SET,
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				CFG_MONITOR_BASE,
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				CFG_MONITOR_BASE + monitor_flash_len - 1,
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				&flash_info[0]);
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#endif
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#ifdef	CFG_ENV_IS_IN_FLASH
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	/* ENV protection ON by default */
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	flash_protect (FLAG_PROTECT_SET,
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			CFG_ENV_ADDR,
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			CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
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			&flash_info[0]);
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#endif
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	flash_info[0].size = size_b0;
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	return (size_b0);
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}
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/*-----------------------------------------------------------------------
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 */
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static void flash_get_offsets (ulong base, flash_info_t * info)
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{
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	int i;
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	if (info->flash_id == FLASH_UNKNOWN) {
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		return;
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	}
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	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
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		for (i = 0; i < info->sector_count; i++) {
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			info->start[i] = base + (i * 0x00020000);
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		}
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	}
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}
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/*-----------------------------------------------------------------------
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 */
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void flash_print_info (flash_info_t * info)
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{
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	int i;
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	if (info->flash_id == FLASH_UNKNOWN) {
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		printf ("missing or unknown FLASH type\n");
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		return;
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	}
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	switch (info->flash_id & FLASH_VENDMASK) {
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	case FLASH_MAN_INTEL:
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		printf ("INTEL ");
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		break;
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	default:
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		printf ("Unknown Vendor ");
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		break;
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	}
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	switch (info->flash_id & FLASH_TYPEMASK) {
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	case FLASH_28F320J3A:
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		printf ("28F320J3A\n");
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		break;
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	case FLASH_28F640J3A:
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		printf ("28F640J3A\n");
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		break;
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	case FLASH_28F128J3A:
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		printf ("28F128J3A\n");
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		break;
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	default:
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		printf ("Unknown Chip Type\n");
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		break;
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	}
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	printf ("  Size: %ld MB in %d Sectors\n",
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			info->size >> 20, info->sector_count);
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	printf ("  Sector Start Addresses:");
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	for (i = 0; i < info->sector_count; ++i) {
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		if ((i % 5) == 0)
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			printf ("\n   ");
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		printf (" %08lX%s",
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			info->start[i],
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			info->protect[i] ? " (RO)" : "     ");
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	}
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	printf ("\n");
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	return;
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}
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/*-----------------------------------------------------------------------
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 */
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/*-----------------------------------------------------------------------
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 */
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/*
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 * The following code cannot be run from FLASH!
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 */
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static ulong flash_get_size (FPWV * addr, flash_info_t * info)
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{
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	FPW value;
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	addr[0] = (FPW) 0x00900090;
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	value = addr[0];
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	debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
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	switch (value) {
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	case (FPW) INTEL_MANUFACT:
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		info->flash_id = FLASH_MAN_INTEL;
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		break;
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	default:
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		info->flash_id = FLASH_UNKNOWN;
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		info->sector_count = 0;
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		info->size = 0;
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		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
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		return (0);			/* no or unknown flash  */
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	}
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#ifdef FLASH_PORT_WIDTH8
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	value = addr[2];			/* device ID        */
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#else
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	value = addr[1];			/* device ID        */
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#endif
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	debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
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	switch (value) {
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	case (FPW) INTEL_ID_28F320J3A:
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		info->flash_id += FLASH_28F320J3A;
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		info->sector_count = 32;
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		info->size = 0x00400000;
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		break;				/* => 4 MB     */
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	case (FPW) INTEL_ID_28F640J3A:
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		info->flash_id += FLASH_28F640J3A;
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		info->sector_count = 64;
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		info->size = 0x00800000;
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		break;				/* => 8 MB     */
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	case (FPW) INTEL_ID_28F128J3A:
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		info->flash_id += FLASH_28F128J3A;
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		info->sector_count = 128;
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		info->size = 0x01000000;
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		break;				/* => 16 MB     */
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	default:
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		info->flash_id = FLASH_UNKNOWN;
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		break;
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	}
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	if (info->sector_count > CFG_MAX_FLASH_SECT) {
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		printf ("** ERROR: sector count %d > max (%d) **\n",
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				info->sector_count, CFG_MAX_FLASH_SECT);
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		info->sector_count = CFG_MAX_FLASH_SECT;
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	}
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	addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
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	return (info->size);
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}
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/*-----------------------------------------------------------------------
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 */
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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	int flag, prot, sect;
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	ulong type, start, now, last;
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	int rcode = 0;
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	if ((s_first < 0) || (s_first > s_last)) {
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		if (info->flash_id == FLASH_UNKNOWN) {
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			printf ("- missing\n");
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		} else {
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			printf ("- no sectors to erase\n");
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		}
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		return 1;
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	}
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	type = (info->flash_id & FLASH_VENDMASK);
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	if ((type != FLASH_MAN_INTEL)) {
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		printf ("Can't erase unknown flash type %08lx - aborted\n",
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			info->flash_id);
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		return 1;
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	}
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	prot = 0;
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	for (sect = s_first; sect <= s_last; ++sect) {
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		if (info->protect[sect]) {
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			prot++;
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		}
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	}
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	if (prot) {
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		printf ("- Warning: %d protected sectors will not be erased!\n",
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			prot);
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	} else {
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		printf ("\n");
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	}
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	start = get_timer (0);
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	last = start;
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	/* Start erase on unprotected sectors */
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	for (sect = s_first; sect <= s_last; sect++) {
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		if (info->protect[sect] == 0) {	/* not protected */
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			FPWV *addr = (FPWV *) (info->start[sect]);
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			FPW status;
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			/* Disable interrupts which might cause a timeout here */
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			flag = disable_interrupts ();
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			*addr = (FPW) 0x00500050;	/* clear status register */
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			*addr = (FPW) 0x00200020;	/* erase setup */
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			*addr = (FPW) 0x00D000D0;	/* erase confirm */
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			/* re-enable interrupts if necessary */
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			if (flag)
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				enable_interrupts ();
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			/* wait at least 80us - let's wait 1 ms */
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			udelay (1000);
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			while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
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			    if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
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				printf ("Timeout\n");
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				*addr = (FPW) 0x00B000B0;	/* suspend erase     */
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				*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
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				rcode = 1;
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				break;
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			    }
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			    /* show that we're waiting */
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			    if ((now - last) > 1000) {	/* every second */
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				putc ('.');
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				last = now;
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			    }
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			}
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			*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
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		}
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	}
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	printf (" done\n");
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	return rcode;
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}
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/*-----------------------------------------------------------------------
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 * Copy memory to flash, returns:
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 * 0 - OK
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 * 1 - write timeout
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 * 2 - Flash not erased
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 * 4 - Flash not identified
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 */
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int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
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{
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	ulong cp, wp;
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	FPW data;
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	int i, l, rc, port_width;
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	if (info->flash_id == FLASH_UNKNOWN) {
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		return 4;
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	}
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/* get lower word aligned address */
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#ifdef FLASH_PORT_WIDTH16
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	wp = (addr & ~1);
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	port_width = 2;
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#elif defined(FLASH_PORT_WIDTH32)
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	wp = (addr & ~3);
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	port_width = 4;
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#else
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	wp = addr;
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	port_width = 1;
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#endif
 | 
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	/*
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	 * handle unaligned start bytes
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	 */
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	if ((l = addr - wp) != 0) {
 | 
						|
		data = 0;
 | 
						|
		for (i = 0, cp = wp; i < l; ++i, ++cp) {
 | 
						|
			data = (data << 8) | (*(uchar *) cp);
 | 
						|
		}
 | 
						|
		for (; i < port_width && cnt > 0; ++i) {
 | 
						|
			data = (data << 8) | *src++;
 | 
						|
			--cnt;
 | 
						|
			++cp;
 | 
						|
		}
 | 
						|
		for (; cnt == 0 && i < port_width; ++i, ++cp) {
 | 
						|
			data = (data << 8) | (*(uchar *) cp);
 | 
						|
		}
 | 
						|
 | 
						|
		if ((rc = write_data (info, wp, data)) != 0) {
 | 
						|
			return (rc);
 | 
						|
		}
 | 
						|
		wp += port_width;
 | 
						|
	}
 | 
						|
 | 
						|
	/*
 | 
						|
	 * handle word aligned part
 | 
						|
	 */
 | 
						|
	while (cnt >= port_width) {
 | 
						|
		data = 0;
 | 
						|
		for (i = 0; i < port_width; ++i) {
 | 
						|
			data = (data << 8) | *src++;
 | 
						|
		}
 | 
						|
		if ((rc = write_data (info, wp, data)) != 0) {
 | 
						|
			return (rc);
 | 
						|
		}
 | 
						|
		wp += port_width;
 | 
						|
		cnt -= port_width;
 | 
						|
	}
 | 
						|
 | 
						|
	if (cnt == 0) {
 | 
						|
		return (0);
 | 
						|
	}
 | 
						|
 | 
						|
	/*
 | 
						|
	 * handle unaligned tail bytes
 | 
						|
	 */
 | 
						|
	data = 0;
 | 
						|
	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
 | 
						|
		data = (data << 8) | *src++;
 | 
						|
		--cnt;
 | 
						|
	}
 | 
						|
	for (; i < port_width; ++i, ++cp) {
 | 
						|
		data = (data << 8) | (*(uchar *) cp);
 | 
						|
	}
 | 
						|
 | 
						|
	return (write_data (info, wp, data));
 | 
						|
}
 | 
						|
 | 
						|
/*-----------------------------------------------------------------------
 | 
						|
 * Write a word or halfword to Flash, returns:
 | 
						|
 * 0 - OK
 | 
						|
 * 1 - write timeout
 | 
						|
 * 2 - Flash not erased
 | 
						|
 */
 | 
						|
static int write_data (flash_info_t * info, ulong dest, FPW data)
 | 
						|
{
 | 
						|
	FPWV *addr = (FPWV *) dest;
 | 
						|
	ulong status;
 | 
						|
	ulong start;
 | 
						|
	int flag;
 | 
						|
 | 
						|
	/* Check if Flash is (sufficiently) erased */
 | 
						|
	if ((*addr & data) != data) {
 | 
						|
		printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
 | 
						|
		return (2);
 | 
						|
	}
 | 
						|
	/* Disable interrupts which might cause a timeout here */
 | 
						|
	flag = disable_interrupts ();
 | 
						|
 | 
						|
	*addr = (FPW) 0x00400040;	/* write setup */
 | 
						|
	*addr = data;
 | 
						|
 | 
						|
	/* re-enable interrupts if necessary */
 | 
						|
	if (flag)
 | 
						|
		enable_interrupts ();
 | 
						|
 | 
						|
	start = get_timer (0);
 | 
						|
 | 
						|
	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
 | 
						|
		if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
 | 
						|
			*addr = (FPW) 0x00FF00FF;	/* restore read mode */
 | 
						|
			return (1);
 | 
						|
		}
 | 
						|
	}
 | 
						|
 | 
						|
	*addr = (FPW) 0x00FF00FF;	/* restore read mode */
 | 
						|
 | 
						|
	return (0);
 | 
						|
}
 |