122 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			122 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| 
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| #include <asm/mmu.h>
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| #include <asm/io.h>
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| #include <mpc83xx.h>
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| #include <pci.h>
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| #include <i2c.h>
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| #include <asm/fsl_i2c.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| static struct pci_region pci1_regions[] = {
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| 	{
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| 		bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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| 		phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
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| 		size: CONFIG_SYS_PCI1_MEM_SIZE,
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| 		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
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| 	},
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| 	{
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| 		bus_start: CONFIG_SYS_PCI1_IO_BASE,
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| 		phys_start: CONFIG_SYS_PCI1_IO_PHYS,
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| 		size: CONFIG_SYS_PCI1_IO_SIZE,
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| 		flags: PCI_REGION_IO
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| 	},
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| 	{
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| 		bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
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| 		phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
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| 		size: CONFIG_SYS_PCI1_MMIO_SIZE,
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| 		flags: PCI_REGION_MEM
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| 	},
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| };
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| 
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| #ifdef CONFIG_MPC83XX_PCI2
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| static struct pci_region pci2_regions[] = {
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| 	{
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| 		bus_start: CONFIG_SYS_PCI2_MEM_BASE,
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| 		phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
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| 		size: CONFIG_SYS_PCI2_MEM_SIZE,
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| 		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
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| 	},
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| 	{
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| 		bus_start: CONFIG_SYS_PCI2_IO_BASE,
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| 		phys_start: CONFIG_SYS_PCI2_IO_PHYS,
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| 		size: CONFIG_SYS_PCI2_IO_SIZE,
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| 		flags: PCI_REGION_IO
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| 	},
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| 	{
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| 		bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
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| 		phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
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| 		size: CONFIG_SYS_PCI2_MMIO_SIZE,
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| 		flags: PCI_REGION_MEM
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| 	},
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| };
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| #endif
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| 
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| void pci_init_board(void)
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| {
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| 	volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
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| 	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
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| 	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
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| #ifndef CONFIG_MPC83XX_PCI2
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| 	struct pci_region *reg[] = { pci1_regions };
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| #else
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| 	struct pci_region *reg[] = { pci1_regions, pci2_regions };
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| #endif
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| 	u8 reg8;
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| 
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| #ifdef CONFIG_HARD_I2C
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| 	i2c_set_bus_num(1);
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| 	/* Read the PCI_M66EN jumper setting */
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| 	if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) ||
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| 	    (i2c_read(CONFIG_SYS_I2C_8574A_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0)) {
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| 		if (reg8 & I2C_8574_PCI66)
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| 			clk->occr = 0xff000000;	/* 66 MHz PCI */
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| 		else
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| 			clk->occr = 0xff600001;	/* 33 MHz PCI */
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| 	} else {
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| 		clk->occr = 0xff600001;	/* 33 MHz PCI */
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| 	}
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| #else
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| 	clk->occr = 0xff000000;	/* 66 MHz PCI */
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| #endif
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| 	udelay(2000);
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| 
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| 	/* Configure PCI Local Access Windows */
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| 	pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
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| 	pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
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| 
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| 	pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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| 	pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M;
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| 
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| 	udelay(2000);
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| 
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| #ifndef CONFIG_MPC83XX_PCI2
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| 	mpc83xx_pci_init(1, reg);
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| #else
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| 	mpc83xx_pci_init(2, reg);
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| #endif
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| }
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