37 lines
		
	
	
		
			549 B
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			37 lines
		
	
	
		
			549 B
		
	
	
	
		
			Plaintext
		
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
 | |
| /*
 | |
|  * Copyright (C) 2012 Altera Corporation <www.altera.com>
 | |
|  */
 | |
| 
 | |
| /dts-v1/;
 | |
| /* First 4KB has trampoline code for secondary cores. */
 | |
| /memreserve/ 0x00000000 0x0001000;
 | |
| #include "socfpga.dtsi"
 | |
| 
 | |
| / {
 | |
| 	soc {
 | |
| 		clkmgr@ffd04000 {
 | |
| 			clocks {
 | |
| 				osc1 {
 | |
| 					clock-frequency = <25000000>;
 | |
| 				};
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		mmc0: dwmmc0@ff704000 {
 | |
| 			broken-cd;
 | |
| 			bus-width = <4>;
 | |
| 			cap-mmc-highspeed;
 | |
| 			cap-sd-highspeed;
 | |
| 		};
 | |
| 
 | |
| 		sysmgr@ffd08000 {
 | |
| 			cpu1-start-addr = <0xffd080c4>;
 | |
| 		};
 | |
| 	};
 | |
| };
 | |
| 
 | |
| &watchdog0 {
 | |
| 	status = "okay";
 | |
| };
 |