85 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			85 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  *  arch/arm/include/asm/assembler.h
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|  *
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|  *  Copyright (C) 1996-2000 Russell King
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  *
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|  *  This file contains arm architecture specific defines
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|  *  for the different processors.
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|  *
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|  *  Do not include any C declarations in this file - it is included by
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|  *  assembler source.
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|  */
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| 
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| #include <config.h>
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| #include <asm/unified.h>
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| 
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| /*
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|  * Endian independent macros for shifting bytes within registers.
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|  */
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| #ifndef __ARMEB__
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| #define lspull		lsr
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| #define lspush		lsl
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| #define get_byte_0	lsl #0
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| #define get_byte_1	lsr #8
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| #define get_byte_2	lsr #16
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| #define get_byte_3	lsr #24
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| #define put_byte_0	lsl #0
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| #define put_byte_1	lsl #8
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| #define put_byte_2	lsl #16
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| #define put_byte_3	lsl #24
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| #else
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| #define lspull		lsl
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| #define lspush		lsr
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| #define get_byte_0	lsr #24
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| #define get_byte_1	lsr #16
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| #define get_byte_2	lsr #8
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| #define get_byte_3      lsl #0
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| #define put_byte_0	lsl #24
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| #define put_byte_1	lsl #16
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| #define put_byte_2	lsl #8
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| #define put_byte_3      lsl #0
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| #endif
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| 
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| /*
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|  * Data preload for architectures that support it
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|  */
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| #if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) || \
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| 	defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \
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| 	defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || \
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| 	defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_7A__) || \
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| 	defined(__ARM_ARCH_7R__)
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| #define PLD(code...)	code
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| #else
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| #define PLD(code...)
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| #endif
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| 
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| /*
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|  * We only support cores that support at least Thumb-1 and thus we use
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|  * 'bx lr'
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|  */
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| 	.irp	c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
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| 	.macro	ret\c, reg
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| 	.ifeqs	"\reg", "lr"
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| 	bx\c	\reg
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| 	.else
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| 	mov\c	pc, \reg
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| 	.endif
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| 	.endm
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| 	.endr
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| 
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| /*
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|  * Cache aligned, used for optimized memcpy/memset
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|  * In the kernel this is only enabled for Feroceon CPU's...
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|  * We disable it especially for Thumb builds since those instructions
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|  * are not made in a Thumb ready way...
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|  */
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| #if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
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| #define CALGN(code...)
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| #else
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| #define CALGN(code...) code
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| #endif
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