452 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			452 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * (C) Copyright 2012 - 2013 CompuLab, Ltd. <www.compulab.co.il>
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|  *
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|  * Authors: Nikita Kiryanov <nikita@compulab.co.il>
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|  *
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|  * Parsing code based on linux/drivers/video/pxafb.c
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|  */
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| 
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| #include <common.h>
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| #include <asm/gpio.h>
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| #include <asm/io.h>
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| #include <stdio_dev.h>
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| #include <asm/arch/dss.h>
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| #include <lcd.h>
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| #include <scf0403_lcd.h>
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| #include <asm/arch-omap3/dss.h>
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| 
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| enum display_type {
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| 	NONE,
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| 	DVI,
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| 	DVI_CUSTOM,
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| 	DATA_IMAGE, /* #define CONFIG_SCF0403_LCD to use */
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| };
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| 
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| #define CMAP_ADDR	0x80100000
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| 
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| /*
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|  * The frame buffer is allocated before we have the chance to parse user input.
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|  * To make sure enough memory is allocated for all resolutions, we define
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|  * vl_{col | row} to the maximal resolution supported by OMAP3.
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|  */
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| vidinfo_t panel_info = {
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| 	.vl_col  = 1400,
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| 	.vl_row  = 1050,
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| 	.vl_bpix = LCD_BPP,
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| 	.cmap = (ushort *)CMAP_ADDR,
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| };
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| 
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| static struct panel_config panel_cfg;
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| static enum display_type lcd_def;
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| 
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| /*
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|  * A note on DVI presets;
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|  * U-Boot can convert 8 bit BMP data to 16 bit BMP data, and OMAP DSS can
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|  * convert 16 bit data into 24 bit data. Thus, GFXFORMAT_RGB16 allows us to
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|  * support two BMP types with one setting.
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|  */
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| static const struct panel_config preset_dvi_640X480 = {
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| 	.lcd_size	= PANEL_LCD_SIZE(640, 480),
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| 	.timing_h	= DSS_HBP(48) | DSS_HFP(16) | DSS_HSW(96),
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| 	.timing_v	= DSS_VBP(33) | DSS_VFP(10) | DSS_VSW(2),
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| 	.pol_freq	= DSS_IHS | DSS_IVS | DSS_IPC,
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| 	.divisor	= 12 | (1 << 16),
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| 	.data_lines	= LCD_INTERFACE_24_BIT,
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| 	.panel_type	= ACTIVE_DISPLAY,
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| 	.load_mode	= 2,
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| 	.gfx_format	= GFXFORMAT_RGB16,
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| };
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| 
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| static const struct panel_config preset_dvi_800X600 = {
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| 	.lcd_size	= PANEL_LCD_SIZE(800, 600),
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| 	.timing_h	= DSS_HBP(88) | DSS_HFP(40) | DSS_HSW(128),
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| 	.timing_v	= DSS_VBP(23) | DSS_VFP(1) | DSS_VSW(4),
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| 	.pol_freq	= DSS_IHS | DSS_IVS | DSS_IPC,
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| 	.divisor	= 8 | (1 << 16),
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| 	.data_lines	= LCD_INTERFACE_24_BIT,
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| 	.panel_type	= ACTIVE_DISPLAY,
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| 	.load_mode	= 2,
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| 	.gfx_format	= GFXFORMAT_RGB16,
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| };
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| 
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| static const struct panel_config preset_dvi_1024X768 = {
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| 	.lcd_size	= PANEL_LCD_SIZE(1024, 768),
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| 	.timing_h	= DSS_HBP(160) | DSS_HFP(24) | DSS_HSW(136),
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| 	.timing_v	= DSS_VBP(29) | DSS_VFP(3) | DSS_VSW(6),
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| 	.pol_freq	= DSS_IHS | DSS_IVS | DSS_IPC,
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| 	.divisor	= 5 | (1 << 16),
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| 	.data_lines	= LCD_INTERFACE_24_BIT,
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| 	.panel_type	= ACTIVE_DISPLAY,
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| 	.load_mode	= 2,
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| 	.gfx_format	= GFXFORMAT_RGB16,
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| };
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| 
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| static const struct panel_config preset_dvi_1152X864 = {
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| 	.lcd_size	= PANEL_LCD_SIZE(1152, 864),
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| 	.timing_h	= DSS_HBP(256) | DSS_HFP(64) | DSS_HSW(128),
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| 	.timing_v	= DSS_VBP(32) | DSS_VFP(1) | DSS_VSW(3),
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| 	.pol_freq	= DSS_IHS | DSS_IVS | DSS_IPC,
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| 	.divisor	= 4 | (1 << 16),
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| 	.data_lines	= LCD_INTERFACE_24_BIT,
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| 	.panel_type	= ACTIVE_DISPLAY,
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| 	.load_mode	= 2,
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| 	.gfx_format	= GFXFORMAT_RGB16,
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| };
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| 
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| static const struct panel_config preset_dvi_1280X960 = {
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| 	.lcd_size	= PANEL_LCD_SIZE(1280, 960),
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| 	.timing_h	= DSS_HBP(312) | DSS_HFP(96) | DSS_HSW(112),
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| 	.timing_v	= DSS_VBP(36) | DSS_VFP(1) | DSS_VSW(3),
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| 	.pol_freq	= DSS_IHS | DSS_IVS | DSS_IPC,
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| 	.divisor	= 3 | (1 << 16),
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| 	.data_lines	= LCD_INTERFACE_24_BIT,
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| 	.panel_type	= ACTIVE_DISPLAY,
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| 	.load_mode	= 2,
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| 	.gfx_format	= GFXFORMAT_RGB16,
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| };
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| 
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| static const struct panel_config preset_dvi_1280X1024 = {
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| 	.lcd_size	= PANEL_LCD_SIZE(1280, 1024),
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| 	.timing_h	= DSS_HBP(248) | DSS_HFP(48) | DSS_HSW(112),
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| 	.timing_v	= DSS_VBP(38) | DSS_VFP(1) | DSS_VSW(3),
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| 	.pol_freq	= DSS_IHS | DSS_IVS | DSS_IPC,
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| 	.divisor	= 3 | (1 << 16),
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| 	.data_lines	= LCD_INTERFACE_24_BIT,
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| 	.panel_type	= ACTIVE_DISPLAY,
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| 	.load_mode	= 2,
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| 	.gfx_format	= GFXFORMAT_RGB16,
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| };
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| 
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| static const struct panel_config preset_dataimage_480X800 = {
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| 	.lcd_size	= PANEL_LCD_SIZE(480, 800),
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| 	.timing_h	= DSS_HBP(2) | DSS_HFP(2) | DSS_HSW(2),
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| 	.timing_v	= DSS_VBP(17) | DSS_VFP(20) | DSS_VSW(3),
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| 	.pol_freq	= DSS_IVS | DSS_IHS | DSS_IPC | DSS_ONOFF,
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| 	.divisor	= 10 | (1 << 10),
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| 	.data_lines	= LCD_INTERFACE_18_BIT,
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| 	.panel_type	= ACTIVE_DISPLAY,
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| 	.load_mode	= 2,
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| 	.gfx_format	= GFXFORMAT_RGB16,
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| };
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| 
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| /*
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|  * set_resolution_params()
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|  *
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|  * Due to usage of multiple display related APIs resolution data is located in
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|  * more than one place. This function updates them all.
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|  */
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| static void set_resolution_params(int x, int y)
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| {
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| 	panel_cfg.lcd_size = PANEL_LCD_SIZE(x, y);
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| 	panel_info.vl_col = x;
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| 	panel_info.vl_row = y;
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| 	lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
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| }
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| 
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| static void set_preset(const struct panel_config preset, int x_res, int y_res)
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| {
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| 	panel_cfg = preset;
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| 	set_resolution_params(x_res, y_res);
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| }
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| 
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| static enum display_type set_dvi_preset(const struct panel_config preset,
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| 					int x_res, int y_res)
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| {
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| 	set_preset(preset, x_res, y_res);
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| 	return DVI;
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| }
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| 
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| static enum display_type set_dataimage_preset(const struct panel_config preset,
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| 		int x_res, int y_res)
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| {
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| 	set_preset(preset, x_res, y_res);
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| 	return DATA_IMAGE;
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| }
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| 
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| /*
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|  * parse_mode() - parse the mode parameter of custom lcd settings
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|  *
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|  * @mode:	<res_x>x<res_y>
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|  *
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|  * Returns -1 on error, 0 on success.
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|  */
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| static int parse_mode(const char *mode)
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| {
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| 	unsigned int modelen = strlen(mode);
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| 	int res_specified = 0;
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| 	unsigned int xres = 0, yres = 0;
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| 	int yres_specified = 0;
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| 	int i;
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| 
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| 	for (i = modelen - 1; i >= 0; i--) {
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| 		switch (mode[i]) {
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| 		case 'x':
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| 			if (!yres_specified) {
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| 				yres = simple_strtoul(&mode[i + 1], NULL, 0);
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| 				yres_specified = 1;
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| 			} else {
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| 				goto done_parsing;
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| 			}
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| 
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| 			break;
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| 		case '0' ... '9':
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| 			break;
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| 		default:
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| 			goto done_parsing;
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| 		}
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| 	}
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| 
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| 	if (i < 0 && yres_specified) {
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| 		xres = simple_strtoul(mode, NULL, 0);
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| 		res_specified = 1;
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| 	}
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| 
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| done_parsing:
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| 	if (res_specified) {
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| 		set_resolution_params(xres, yres);
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| 	} else {
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| 		printf("LCD: invalid mode: %s\n", mode);
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| 		return -1;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| #define PIXEL_CLK_NUMERATOR (26 * 432 / 39)
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| /*
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|  * parse_pixclock() - Parse the pixclock parameter of custom lcd settings
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|  *
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|  * @pixclock:	the desired pixel clock
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|  *
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|  * Returns -1 on error, 0 on success.
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|  *
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|  * Handling the pixel_clock:
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|  *
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|  * Pixel clock is defined in the OMAP35x TRM as follows:
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|  * pixel_clock =
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|  * (SYS_CLK * 2 * PRCM.CM_CLKSEL2_PLL[18:8]) /
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|  * (DSS.DISPC_DIVISOR[23:16] * DSS.DISPC_DIVISOR[6:0] *
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|  * PRCM.CM_CLKSEL_DSS[4:0] * (PRCM.CM_CLKSEL2_PLL[6:0] + 1))
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|  *
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|  * In practice, this means that in order to set the
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|  * divisor for the desired pixel clock one needs to
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|  * solve the following equation:
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|  *
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|  * 26 * 432 / (39 * <pixel_clock>) = DSS.DISPC_DIVISOR[6:0]
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|  *
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|  * NOTE: the explicit equation above is reduced. Do not
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|  * try to infer anything from these numbers.
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|  */
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| static int parse_pixclock(char *pixclock)
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| {
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| 	int divisor, pixclock_val;
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| 	char *pixclk_start = pixclock;
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| 
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| 	pixclock_val = simple_strtoul(pixclock, &pixclock, 10);
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| 	divisor = DIV_ROUND_UP(PIXEL_CLK_NUMERATOR, pixclock_val);
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| 	/* 0 and 1 are illegal values for PCD */
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| 	if (divisor <= 1)
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| 		divisor = 2;
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| 
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| 	panel_cfg.divisor = divisor | (1 << 16);
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| 	if (pixclock[0] != '\0') {
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| 		printf("LCD: invalid value for pixclock:%s\n", pixclk_start);
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| 		return -1;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * parse_setting() - parse a single setting of custom lcd parameters
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|  *
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|  * @setting:	The custom lcd setting <name>:<value>
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|  *
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|  * Returns -1 on failure, 0 on success.
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|  */
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| static int parse_setting(char *setting)
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| {
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| 	int num_val;
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| 	char *setting_start = setting;
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| 
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| 	if (!strncmp(setting, "mode:", 5)) {
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| 		return parse_mode(setting + 5);
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| 	} else if (!strncmp(setting, "pixclock:", 9)) {
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| 		return parse_pixclock(setting + 9);
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| 	} else if (!strncmp(setting, "left:", 5)) {
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| 		num_val = simple_strtoul(setting + 5, &setting, 0);
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| 		panel_cfg.timing_h |= DSS_HBP(num_val);
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| 	} else if (!strncmp(setting, "right:", 6)) {
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| 		num_val = simple_strtoul(setting + 6, &setting, 0);
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| 		panel_cfg.timing_h |= DSS_HFP(num_val);
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| 	} else if (!strncmp(setting, "upper:", 6)) {
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| 		num_val = simple_strtoul(setting + 6, &setting, 0);
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| 		panel_cfg.timing_v |= DSS_VBP(num_val);
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| 	} else if (!strncmp(setting, "lower:", 6)) {
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| 		num_val = simple_strtoul(setting + 6, &setting, 0);
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| 		panel_cfg.timing_v |= DSS_VFP(num_val);
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| 	} else if (!strncmp(setting, "hsynclen:", 9)) {
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| 		num_val = simple_strtoul(setting + 9, &setting, 0);
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| 		panel_cfg.timing_h |= DSS_HSW(num_val);
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| 	} else if (!strncmp(setting, "vsynclen:", 9)) {
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| 		num_val = simple_strtoul(setting + 9, &setting, 0);
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| 		panel_cfg.timing_v |= DSS_VSW(num_val);
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| 	} else if (!strncmp(setting, "hsync:", 6)) {
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| 		if (simple_strtoul(setting + 6, &setting, 0) == 0)
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| 			panel_cfg.pol_freq |= DSS_IHS;
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| 		else
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| 			panel_cfg.pol_freq &= ~DSS_IHS;
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| 	} else if (!strncmp(setting, "vsync:", 6)) {
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| 		if (simple_strtoul(setting + 6, &setting, 0) == 0)
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| 			panel_cfg.pol_freq |= DSS_IVS;
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| 		else
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| 			panel_cfg.pol_freq &= ~DSS_IVS;
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| 	} else if (!strncmp(setting, "outputen:", 9)) {
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| 		if (simple_strtoul(setting + 9, &setting, 0) == 0)
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| 			panel_cfg.pol_freq |= DSS_IEO;
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| 		else
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| 			panel_cfg.pol_freq &= ~DSS_IEO;
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| 	} else if (!strncmp(setting, "pixclockpol:", 12)) {
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| 		if (simple_strtoul(setting + 12, &setting, 0) == 0)
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| 			panel_cfg.pol_freq |= DSS_IPC;
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| 		else
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| 			panel_cfg.pol_freq &= ~DSS_IPC;
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| 	} else if (!strncmp(setting, "active", 6)) {
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| 		panel_cfg.panel_type = ACTIVE_DISPLAY;
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| 		return 0; /* Avoid sanity check below */
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| 	} else if (!strncmp(setting, "passive", 7)) {
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| 		panel_cfg.panel_type = PASSIVE_DISPLAY;
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| 		return 0; /* Avoid sanity check below */
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| 	} else if (!strncmp(setting, "display:", 8)) {
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| 		if (!strncmp(setting + 8, "dvi", 3)) {
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| 			lcd_def = DVI_CUSTOM;
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| 			return 0; /* Avoid sanity check below */
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| 		}
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| 	} else {
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| 		printf("LCD: unknown option %s\n", setting_start);
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| 		return -1;
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| 	}
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| 
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| 	if (setting[0] != '\0') {
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| 		printf("LCD: invalid value for %s\n", setting_start);
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| 		return -1;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * env_parse_customlcd() - parse custom lcd params from an environment variable.
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|  *
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|  * @custom_lcd_params:	The environment variable containing the lcd params.
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|  *
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|  * Returns -1 on failure, 0 on success.
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|  */
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| static int parse_customlcd(char *custom_lcd_params)
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| {
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| 	char params_cpy[160];
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| 	char *setting;
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| 
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| 	strncpy(params_cpy, custom_lcd_params, 160);
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| 	setting = strtok(params_cpy, ",");
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| 	while (setting) {
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| 		if (parse_setting(setting) < 0)
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| 			return -1;
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| 
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| 		setting = strtok(NULL, ",");
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| 	}
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| 
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| 	/* Currently we don't support changing this via custom lcd params */
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| 	panel_cfg.data_lines = LCD_INTERFACE_24_BIT;
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| 	panel_cfg.gfx_format = GFXFORMAT_RGB16; /* See dvi predefines note */
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * env_parse_displaytype() - parse display type.
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|  *
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|  * Parses the environment variable "displaytype", which contains the
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|  * name of the display type or preset, in which case it applies its
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|  * configurations.
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|  *
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|  * Returns the type of display that was specified.
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|  */
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| static enum display_type env_parse_displaytype(char *displaytype)
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| {
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| 	if (!strncmp(displaytype, "dvi640x480", 10))
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| 		return set_dvi_preset(preset_dvi_640X480, 640, 480);
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| 	else if (!strncmp(displaytype, "dvi800x600", 10))
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| 		return set_dvi_preset(preset_dvi_800X600, 800, 600);
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| 	else if (!strncmp(displaytype, "dvi1024x768", 11))
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| 		return set_dvi_preset(preset_dvi_1024X768, 1024, 768);
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| 	else if (!strncmp(displaytype, "dvi1152x864", 11))
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| 		return set_dvi_preset(preset_dvi_1152X864, 1152, 864);
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| 	else if (!strncmp(displaytype, "dvi1280x960", 11))
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| 		return set_dvi_preset(preset_dvi_1280X960, 1280, 960);
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| 	else if (!strncmp(displaytype, "dvi1280x1024", 12))
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| 		return set_dvi_preset(preset_dvi_1280X1024, 1280, 1024);
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| 	else if (!strncmp(displaytype, "dataimage480x800", 16))
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| 		return set_dataimage_preset(preset_dataimage_480X800, 480, 800);
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| 
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| 	return NONE;
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| }
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| 
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| void lcd_ctrl_init(void *lcdbase)
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| {
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| 	struct prcm *prcm = (struct prcm *)PRCM_BASE;
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| 	char *custom_lcd;
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| 	char *displaytype = env_get("displaytype");
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| 
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| 	if (displaytype == NULL)
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| 		return;
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| 
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| 	lcd_def = env_parse_displaytype(displaytype);
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| 	/* If we did not recognize the preset, check if it's an env variable */
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| 	if (lcd_def == NONE) {
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| 		custom_lcd = env_get(displaytype);
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| 		if (custom_lcd == NULL || parse_customlcd(custom_lcd) < 0)
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| 			return;
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| 	}
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| 
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| 	panel_cfg.frame_buffer = lcdbase;
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| 	omap3_dss_panel_config(&panel_cfg);
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| 	/*
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| 	 * Pixel clock is defined with many divisions and only few
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| 	 * multiplications of the system clock. Since DSS FCLK divisor is set
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| 	 * to 16 by default, we need to set it to a smaller value, like 3
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| 	 * (chosen via trial and error).
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| 	 */
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| 	clrsetbits_le32(&prcm->clksel_dss, 0xF, 3);
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| }
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| 
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| #ifdef CONFIG_SCF0403_LCD
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| static void scf0403_enable(void)
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| {
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| 	gpio_direction_output(58, 1);
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| 	scf0403_init(157);
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| }
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| #else
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| static inline void scf0403_enable(void) {}
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| #endif
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| 
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| void lcd_enable(void)
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| {
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| 	switch (lcd_def) {
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| 	case NONE:
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| 		return;
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| 	case DVI:
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| 	case DVI_CUSTOM:
 | |
| 		gpio_direction_output(54, 0); /* Turn on DVI */
 | |
| 		break;
 | |
| 	case DATA_IMAGE:
 | |
| 		scf0403_enable();
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	omap3_dss_enable();
 | |
| }
 | |
| 
 | |
| void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) {}
 |