43 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			43 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Copyright (C) 2017 DENX Software Engineering
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|  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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|  */
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| 
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| #ifndef __DISPL5_COMMON_H_
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| #define __DISPL5_COMMON_H_
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| 
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| #define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |	       \
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| 	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |	       \
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| 	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
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| 
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| #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |	       \
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| 	PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |	       \
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| 	PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
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| 
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| #define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
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| 	PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED	  |		\
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| 	PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
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| 
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| #define SPI_PAD_CTRL (PAD_CTL_HYS |				\
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| 	PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED |		\
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| 	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST)
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| 
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| #define I2C_PAD_CTRL	(PAD_CTL_PKE | PAD_CTL_PUE |		\
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| 	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
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| 	PAD_CTL_DSE_40ohm | PAD_CTL_HYS |			\
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| 	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
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| 
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| #define ENET_PAD_CTRL_CLK  ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
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| 	PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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| 
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| void displ5_set_iomux_uart_spl(void);
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| void displ5_set_iomux_uart(void);
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| void displ5_set_iomux_ecspi_spl(void);
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| void displ5_set_iomux_ecspi(void);
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| void displ5_set_iomux_usdhc_spl(void);
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| void displ5_set_iomux_usdhc(void);
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| void displ5_set_iomux_misc_spl(void);
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| 
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| #endif /* __DISPL5_COMMON_H_ */
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