200 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			200 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Synopsys DesignWare Multimedia Card Interface driver
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|  * extensions used in various Synopsys ARC devboards.
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|  *
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|  * Copyright (C) 2019 Synopsys
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|  * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
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|  */
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| 
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| #include <common.h>
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| #include <clk.h>
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| #include <dm.h>
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| #include <dwmmc.h>
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| #include <errno.h>
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| #include <fdtdec.h>
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| #include <linux/libfdt.h>
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| #include <linux/err.h>
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| #include <malloc.h>
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| 
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| #define CLOCK_MIN		400000	/*  400 kHz */
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| #define FIFO_MIN		8
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| #define FIFO_MAX		4096
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| 
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| struct snps_dwmci_plat {
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| 	struct mmc_config	cfg;
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| 	struct mmc		mmc;
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| };
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| 
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| struct snps_dwmci_priv_data {
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| 	struct dwmci_host	host;
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| 	u32			f_max;
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| };
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| 
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| static int snps_dwmmc_clk_setup(struct udevice *dev)
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| {
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| 	struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
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| 	struct dwmci_host *host = &priv->host;
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| 
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| 	struct clk clk_ciu, clk_biu;
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| 	int ret;
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| 
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| 	ret = clk_get_by_name(dev, "ciu", &clk_ciu);
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| 	if (ret)
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| 		goto clk_err;
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| 
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| 	ret = clk_enable(&clk_ciu);
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| 	if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
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| 		goto clk_err_ciu;
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| 
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| 	host->bus_hz = clk_get_rate(&clk_ciu);
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| 	if (host->bus_hz < CLOCK_MIN) {
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| 		ret = -EINVAL;
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| 		goto clk_err_ciu_dis;
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| 	}
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| 
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| 	ret = clk_get_by_name(dev, "biu", &clk_biu);
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| 	if (ret)
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| 		goto clk_err_ciu_dis;
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| 
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| 	ret = clk_enable(&clk_biu);
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| 	if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
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| 		goto clk_err_biu;
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| 
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| 	return 0;
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| 
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| clk_err_biu:
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| 	clk_free(&clk_biu);
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| clk_err_ciu_dis:
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| 	clk_disable(&clk_ciu);
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| clk_err_ciu:
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| 	clk_free(&clk_ciu);
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| clk_err:
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| 	dev_err(dev, "failed to setup clocks, ret %d\n", ret);
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| 
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| 	return ret;
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| }
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| 
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| static int snps_dwmmc_ofdata_to_platdata(struct udevice *dev)
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| {
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| 	struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
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| 	struct dwmci_host *host = &priv->host;
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| 	u32 fifo_depth;
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| 	int ret;
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| 
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| 	host->ioaddr = devfdt_get_addr_ptr(dev);
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| 
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| 	/*
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| 	 * If fifo-depth is unset don't set fifoth_val - we will try to
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| 	 * auto detect it.
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| 	 */
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| 	ret = dev_read_u32(dev, "fifo-depth", &fifo_depth);
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| 	if (!ret) {
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| 		if (fifo_depth < FIFO_MIN || fifo_depth > FIFO_MAX)
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| 			return -EINVAL;
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| 
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| 		host->fifoth_val = MSIZE(0x2) |
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| 				   RX_WMARK(fifo_depth / 2 - 1) |
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| 				   TX_WMARK(fifo_depth / 2);
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| 	}
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| 
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| 	host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
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| 	if (host->buswidth != 1 && host->buswidth != 4 && host->buswidth != 8)
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| 		return -EINVAL;
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| 
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| 	/*
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| 	 * If max-frequency is unset don't set priv->f_max - we will use
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| 	 * host->bus_hz in probe() instead.
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| 	 */
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| 	ret = dev_read_u32(dev, "max-frequency", &priv->f_max);
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| 	if (!ret && priv->f_max < CLOCK_MIN)
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| 		return -EINVAL;
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| 
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| 	host->fifo_mode = dev_read_bool(dev, "fifo-mode");
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| 	host->name = dev->name;
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| 	host->dev_index = 0;
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| 	host->priv = priv;
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| 
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| 	return 0;
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| }
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| 
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| int snps_dwmmc_getcd(struct udevice *dev)
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| {
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| 	struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
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| 	struct dwmci_host *host = &priv->host;
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| 
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| 	return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
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| }
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| 
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| struct dm_mmc_ops snps_dwmci_dm_ops;
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| 
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| static int snps_dwmmc_probe(struct udevice *dev)
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| {
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| #ifdef CONFIG_BLK
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| 	struct snps_dwmci_plat *plat = dev_get_platdata(dev);
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| #endif
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| 	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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| 	struct snps_dwmci_priv_data *priv = dev_get_priv(dev);
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| 	struct dwmci_host *host = &priv->host;
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| 	unsigned int clock_max;
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| 	int ret;
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| 
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| 	/* Extend generic 'dm_dwmci_ops' with our 'getcd' implementation */
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| 	memcpy(&snps_dwmci_dm_ops, &dm_dwmci_ops, sizeof(struct dm_mmc_ops));
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| 	snps_dwmci_dm_ops.get_cd = snps_dwmmc_getcd;
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| 
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| 	ret = snps_dwmmc_clk_setup(dev);
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| 	if (ret)
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| 		return ret;
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| 
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| 	if (!priv->f_max)
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| 		clock_max = host->bus_hz;
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| 	else
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| 		clock_max = min_t(unsigned int, host->bus_hz, priv->f_max);
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| 
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| #ifdef CONFIG_BLK
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| 	dwmci_setup_cfg(&plat->cfg, host, clock_max, CLOCK_MIN);
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| 	host->mmc = &plat->mmc;
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| #else
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| 	ret = add_dwmci(host, clock_max, CLOCK_MIN);
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| 	if (ret)
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| 		return ret;
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| #endif
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| 	host->mmc->priv = &priv->host;
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| 	upriv->mmc = host->mmc;
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| 	host->mmc->dev = dev;
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| 
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| 	return dwmci_probe(dev);
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| }
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| 
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| static int snps_dwmmc_bind(struct udevice *dev)
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| {
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| #ifdef CONFIG_BLK
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| 	struct snps_dwmci_plat *plat = dev_get_platdata(dev);
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| 	int ret;
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| 
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| 	ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
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| 	if (ret)
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| 		return ret;
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| #endif
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| 
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| 	return 0;
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| }
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| 
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| static const struct udevice_id snps_dwmmc_ids[] = {
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| 	{ .compatible = "snps,dw-mshc" },
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| 	{ }
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| };
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| 
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| U_BOOT_DRIVER(snps_dwmmc_drv) = {
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| 	.name				= "snps_dw_mmc",
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| 	.id				= UCLASS_MMC,
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| 	.of_match			= snps_dwmmc_ids,
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| 	.ofdata_to_platdata		= snps_dwmmc_ofdata_to_platdata,
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| 	.ops				= &snps_dwmci_dm_ops,
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| 	.bind				= snps_dwmmc_bind,
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| 	.probe				= snps_dwmmc_probe,
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| 	.priv_auto_alloc_size		= sizeof(struct snps_dwmci_priv_data),
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| 	.platdata_auto_alloc_size	= sizeof(struct snps_dwmci_plat),
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| };
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