150 lines
3.5 KiB
C
150 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 Google LLC
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* Copyright 2014 Rockchip Electronics Co., Ltd.
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* Taken from dc i2s/rockchip.c
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*/
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#define LOG_CATEGORY UCLASS_I2S
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#include <common.h>
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#include <dm.h>
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#include <i2s.h>
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#include <sound.h>
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#include <asm/io.h>
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struct rk_i2s_regs {
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u32 txcr; /* I2S_TXCR, 0x00 */
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u32 rxcr; /* I2S_RXCR, 0x04 */
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u32 ckr; /* I2S_CKR, 0x08 */
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u32 fifolr; /* I2S_FIFOLR, 0x0C */
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u32 dmacr; /* I2S_DMACR, 0x10 */
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u32 intcr; /* I2S_INTCR, 0x14 */
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u32 intsr; /* I2S_INTSR, 0x18 */
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u32 xfer; /* I2S_XFER, 0x1C */
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u32 clr; /* I2S_CLR, 0x20 */
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u32 txdr; /* I2S_TXDR, 0x24 */
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u32 rxdr; /* I2S_RXDR, 0x28 */
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};
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enum {
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/* I2S_XFER */
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I2S_RX_TRAN_BIT = BIT(1),
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I2S_TX_TRAN_BIT = BIT(0),
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I2S_TRAN_MASK = 3 << 0,
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/* I2S_TXCKR */
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I2S_MCLK_DIV_SHIFT = 16,
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I2S_MCLK_DIV_MASK = (0xff << I2S_MCLK_DIV_SHIFT),
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I2S_RX_SCLK_DIV_SHIFT = 8,
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I2S_RX_SCLK_DIV_MASK = 0xff << I2S_RX_SCLK_DIV_SHIFT,
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I2S_TX_SCLK_DIV_SHIFT = 0,
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I2S_TX_SCLK_DIV_MASK = 0xff << I2S_TX_SCLK_DIV_SHIFT,
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I2S_DATA_WIDTH_SHIFT = 0,
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I2S_DATA_WIDTH_MASK = 0x1f << I2S_DATA_WIDTH_SHIFT,
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};
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static int rockchip_i2s_init(struct i2s_uc_priv *priv)
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{
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struct rk_i2s_regs *regs = (struct rk_i2s_regs *)priv->base_address;
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u32 bps = priv->bitspersample;
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u32 lrf = priv->rfs;
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u32 chn = priv->channels;
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u32 mode = 0;
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clrbits_le32(®s->xfer, I2S_TX_TRAN_BIT);
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mode = readl(®s->txcr) & ~0x1f;
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switch (priv->bitspersample) {
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case 16:
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case 24:
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mode |= (priv->bitspersample - 1) << I2S_DATA_WIDTH_SHIFT;
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break;
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default:
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log_err("Invalid sample size input %d\n", priv->bitspersample);
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return -EINVAL;
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}
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writel(mode, ®s->txcr);
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mode = readl(®s->ckr) & ~I2S_MCLK_DIV_MASK;
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mode |= (lrf / (bps * chn) - 1) << I2S_MCLK_DIV_SHIFT;
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mode &= ~I2S_TX_SCLK_DIV_MASK;
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mode |= (priv->bitspersample * priv->channels - 1) <<
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I2S_TX_SCLK_DIV_SHIFT;
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writel(mode, ®s->ckr);
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return 0;
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}
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static int i2s_send_data(struct rk_i2s_regs *regs, u32 *data, uint length)
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{
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for (int i = 0; i < min(32u, length); i++)
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writel(*data++, ®s->txdr);
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length -= min(32u, length);
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/* enable both tx and rx */
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setbits_le32(®s->xfer, I2S_TRAN_MASK);
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while (length) {
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if ((readl(®s->fifolr) & 0x3f) < 0x20) {
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writel(*data++, ®s->txdr);
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length--;
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}
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}
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while (readl(®s->fifolr) & 0x3f)
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/* wait until FIFO empty */;
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clrbits_le32(®s->xfer, I2S_TRAN_MASK);
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writel(0, ®s->clr);
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return 0;
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}
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static int rockchip_i2s_tx_data(struct udevice *dev, void *data, uint data_size)
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{
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struct i2s_uc_priv *priv = dev_get_uclass_priv(dev);
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struct rk_i2s_regs *regs = (struct rk_i2s_regs *)priv->base_address;
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return i2s_send_data(regs, data, data_size / sizeof(u32));
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}
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static int rockchip_i2s_probe(struct udevice *dev)
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{
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struct i2s_uc_priv *priv = dev_get_uclass_priv(dev);
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ulong base;
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base = dev_read_addr(dev);
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if (base == FDT_ADDR_T_NONE) {
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log_debug("Missing i2s base\n");
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return -EINVAL;
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}
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priv->base_address = base;
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priv->id = 1;
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priv->audio_pll_clk = 4800000;
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priv->samplingrate = 48000;
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priv->bitspersample = 16;
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priv->channels = 2;
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priv->rfs = 256;
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priv->bfs = 32;
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return rockchip_i2s_init(priv);
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}
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static const struct i2s_ops rockchip_i2s_ops = {
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.tx_data = rockchip_i2s_tx_data,
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};
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static const struct udevice_id rockchip_i2s_ids[] = {
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{ .compatible = "rockchip,rk3288-i2s" },
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{ }
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};
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U_BOOT_DRIVER(rockchip_i2s) = {
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.name = "rockchip_i2s",
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.id = UCLASS_I2S,
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.of_match = rockchip_i2s_ids,
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.probe = rockchip_i2s_probe,
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.ops = &rockchip_i2s_ops,
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};
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