84 lines
2.0 KiB
C
84 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2011
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* eInfochips Ltd. <www.einfochips.com>
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* Written-by: Ajay Bhargav <contact@8051projects.net>
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*
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* Based on Aspenite:
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* (C) Copyright 2010
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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* Contributor: Mahavir Jain <mjain@marvell.com>
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*/
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#ifndef __CONFIG_GPLUGD_H
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#define __CONFIG_GPLUGD_H
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */
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#define CONFIG_ARMADA100 1 /* SOC Family Name */
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#define CONFIG_ARMADA168 1 /* SOC Used on this Board */
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#define CONFIG_MACH_TYPE MACH_TYPE_GPLUGD /* Machine type */
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#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
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/*
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* There is no internal RAM in ARMADA100, using DRAM
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* TBD: dcache to be used for this
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*/
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000)
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/*
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* Commands configuration
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*/
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/* Disable DCACHE */
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#define CONFIG_SYS_DCACHE_OFF
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/* Network configuration */
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#ifdef CONFIG_CMD_NET
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#define CONFIG_ARMADA100_FEC
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/* DHCP Support */
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#define CONFIG_BOOTP_DHCP_REQUEST_DELAY 50000
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#endif /* CONFIG_CMD_NET */
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/* GPIO Support */
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#define CONFIG_MARVELL_GPIO
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/* PHY configuration */
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#define CONFIG_RESET_PHY_R
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/* 88E3015 register definition */
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#define PHY_LED_PAR_SEL_REG 22
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#define PHY_LED_MAN_REG 25
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#define PHY_LED_VAL 0x5b /* LINK LED1, ACT LED2 */
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/* GPIO Configuration for PHY */
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#define CONFIG_SYS_GPIO_PHY_RST 104 /* GPIO104 */
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/* Flash Support */
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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*/
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#include "mv-common.h"
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#ifdef CONFIG_SYS_NS16550_COM1
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#undef CONFIG_SYS_NS16550_COM1
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#endif /* CONFIG_SYS_NS16550_COM1 */
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#define CONFIG_SYS_NS16550_COM1 ARMD1_UART3_BASE
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/*
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* Environment variables configurations
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*/
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#define CONFIG_ENV_SIZE 0x4000
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_ARMADA100
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#define CONFIG_EHCI_IS_TDI
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#endif /* CONFIG_CMD_USB */
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#endif /* __CONFIG_GPLUGD_H */
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