332 lines
		
	
	
		
			8.6 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			332 lines
		
	
	
		
			8.6 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2003
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|  * Texas Instruments <www.ti.com>
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|  *
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Marius Groeger <mgroeger@sysgo.de>
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|  *
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Alex Zuepke <azu@sysgo.de>
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|  *
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|  * (C) Copyright 2002-2004
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|  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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|  *
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|  * (C) Copyright 2004
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|  * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <arm925t.h>
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| 
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| #include <asm/proc-armv/ptrace.h>
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| 
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| extern void reset_cpu(ulong addr);
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| #define TIMER_LOAD_VAL 0xffffffff
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| 
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| /* macro to read the 32 bit timer */
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| #ifdef CONFIG_OMAP
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| #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
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| #endif
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| #ifdef CONFIG_INTEGRATOR
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| #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
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| #endif
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| #ifdef CONFIG_VERSATILE
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| #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
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| #endif
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| 
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| #ifdef CONFIG_USE_IRQ
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| /* enable IRQ interrupts */
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| void enable_interrupts (void)
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| {
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| 	unsigned long temp;
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| 	__asm__ __volatile__("mrs %0, cpsr\n"
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| 			     "bic %0, %0, #0x80\n"
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| 			     "msr cpsr_c, %0"
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| 			     : "=r" (temp)
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| 			     :
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| 			     : "memory");
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| }
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| 
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| 
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| /*
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|  * disable IRQ/FIQ interrupts
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|  * returns true if interrupts had been enabled before we disabled them
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|  */
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| int disable_interrupts (void)
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| {
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| 	unsigned long old,temp;
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| 	__asm__ __volatile__("mrs %0, cpsr\n"
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| 			     "orr %1, %0, #0xc0\n"
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| 			     "msr cpsr_c, %1"
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| 			     : "=r" (old), "=r" (temp)
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| 			     :
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| 			     : "memory");
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| 	return (old & 0x80) == 0;
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| }
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| #else
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| void enable_interrupts (void)
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| {
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| 	return;
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| }
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| int disable_interrupts (void)
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| {
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| 	return 0;
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| }
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| #endif
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| 
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| 
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| void bad_mode (void)
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| {
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| 	panic ("Resetting CPU ...\n");
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| 	reset_cpu (0);
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| }
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| 
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| void show_regs (struct pt_regs *regs)
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| {
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| 	unsigned long flags;
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| 	const char *processor_modes[] = {
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| 	"USER_26",	"FIQ_26",	"IRQ_26",	"SVC_26",
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| 	"UK4_26",	"UK5_26",	"UK6_26",	"UK7_26",
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| 	"UK8_26",	"UK9_26",	"UK10_26",	"UK11_26",
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| 	"UK12_26",	"UK13_26",	"UK14_26",	"UK15_26",
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| 	"USER_32",	"FIQ_32",	"IRQ_32",	"SVC_32",
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| 	"UK4_32",	"UK5_32",	"UK6_32",	"ABT_32",
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| 	"UK8_32",	"UK9_32",	"UK10_32",	"UND_32",
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| 	"UK12_32",	"UK13_32",	"UK14_32",	"SYS_32",
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| 	};
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| 
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| 	flags = condition_codes (regs);
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| 
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| 	printf ("pc : [<%08lx>]    lr : [<%08lx>]\n"
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| 		"sp : %08lx  ip : %08lx  fp : %08lx\n",
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| 		instruction_pointer (regs),
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| 		regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
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| 	printf ("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
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| 		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
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| 	printf ("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
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| 		regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
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| 	printf ("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
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| 		regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
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| 	printf ("Flags: %c%c%c%c",
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| 		flags & CC_N_BIT ? 'N' : 'n',
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| 		flags & CC_Z_BIT ? 'Z' : 'z',
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| 		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
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| 	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
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| 		interrupts_enabled (regs) ? "on" : "off",
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| 		fast_interrupts_enabled (regs) ? "on" : "off",
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| 		processor_modes[processor_mode (regs)],
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| 		thumb_mode (regs) ? " (T)" : "");
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| }
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| 
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| void do_undefined_instruction (struct pt_regs *pt_regs)
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| {
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| 	printf ("undefined instruction\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_software_interrupt (struct pt_regs *pt_regs)
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| {
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| 	printf ("software interrupt\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_prefetch_abort (struct pt_regs *pt_regs)
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| {
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| 	printf ("prefetch abort\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_data_abort (struct pt_regs *pt_regs)
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| {
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| 	printf ("data abort\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_not_used (struct pt_regs *pt_regs)
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| {
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| 	printf ("not used\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_fiq (struct pt_regs *pt_regs)
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| {
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| 	printf ("fast interrupt request\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| void do_irq (struct pt_regs *pt_regs)
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| {
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| 	printf ("interrupt request\n");
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| 	show_regs (pt_regs);
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| 	bad_mode ();
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| }
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| 
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| static ulong timestamp;
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| static ulong lastdec;
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| 
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| /* nothing really to do with interrupts, just starts up a counter. */
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| int interrupt_init (void)
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| {
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| #ifdef CONFIG_OMAP
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| 	int32_t val;
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| 
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| 	/* Start the decrementer ticking down from 0xffffffff */
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| 	*((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
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| 	val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
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| 	*((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
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| #endif	/* CONFIG_OMAP */
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| #ifdef CONFIG_INTEGRATOR
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| 	/* Load timer with initial value */
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| 	*(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
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| 	/* Set timer to be enabled, free-running, no interrupts, 256 divider */
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| 	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
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| #endif	/* CONFIG_INTEGRATOR */
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| #ifdef CONFIG_VERSATILE
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| 	*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;	/* TimerLoad */
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| 	*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;	/* TimerValue */
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| 	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
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| #endif	/* CONFIG_VERSATILE */
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| 
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| 	/* init the timestamp and lastdec value */
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| 	reset_timer_masked();
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| 
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| 	return (0);
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| }
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| 
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| /*
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|  * timer without interrupts
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|  */
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| 
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| void reset_timer (void)
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| {
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| 	reset_timer_masked ();
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| }
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| 
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| ulong get_timer (ulong base)
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| {
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| 	return get_timer_masked () - base;
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| }
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| 
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| void set_timer (ulong t)
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| {
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| 	timestamp = t;
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| }
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| 
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| /* delay x useconds AND perserve advance timstamp value */
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| void udelay (unsigned long usec)
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| {
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| 	ulong tmo, tmp;
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| 
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| 	if(usec >= 1000){               /* if "big" number, spread normalization to seconds */
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| 		tmo = usec / 1000;      /* start to normalize for usec to ticks per sec */
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| 		tmo *= CFG_HZ;          /* find number of "ticks" to wait to achieve target */
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| 		tmo /= 1000;            /* finish normalize. */
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| 	}else{                          /* else small number, don't kill it prior to HZ multiply */
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| 		tmo = usec * CFG_HZ;
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| 		tmo /= (1000*1000);
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| 	}
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| 
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| 	tmp = get_timer (0);		/* get current timestamp */
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| 	if( (tmo + tmp + 1) < tmp ) 	/* if setting this fordward will roll time stamp */
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| 		reset_timer_masked ();	/* reset "advancing" timestamp to 0, set lastdec value */
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| 	else
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| 		tmo += tmp;		/* else, set advancing stamp wake up time */
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| 
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| 	while (get_timer_masked () < tmo)/* loop till event */
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| 		/*NOP*/;
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| }
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| 
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| void reset_timer_masked (void)
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| {
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| 	/* reset time */
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| 	lastdec = READ_TIMER;  /* capure current decrementer value time */
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| 	timestamp = 0;         /* start "advancing" time stamp from 0 */
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| }
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| 
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| ulong get_timer_masked (void)
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| {
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| 	ulong now = READ_TIMER;		/* current tick value */
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| 
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| 	if (lastdec >= now) {		/* normal mode (non roll) */
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| 		/* normal mode */
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| 		timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
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| 	} else {			/* we have overflow of the count down timer */
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| 		/* nts = ts + ld + (TLV - now)
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| 		 * ts=old stamp, ld=time that passed before passing through -1
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| 		 * (TLV-now) amount of time after passing though -1
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| 		 * nts = new "advancing time stamp"...it could also roll and cause problems.
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| 		 */
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| 		timestamp += lastdec + TIMER_LOAD_VAL - now;
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| 	}
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| 	lastdec = now;
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| 
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| 	return timestamp;
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| }
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| 
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| /* waits specified delay value and resets timestamp */
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| void udelay_masked (unsigned long usec)
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| {
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| 	ulong tmo;
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| 
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| 	if(usec >= 1000){               /* if "big" number, spread normalization to seconds */
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| 		tmo = usec / 1000;      /* start to normalize for usec to ticks per sec */
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| 		tmo *= CFG_HZ;          /* find number of "ticks" to wait to achieve target */
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| 		tmo /= 1000;            /* finish normalize. */
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| 	}else{                          /* else small number, don't kill it prior to HZ multiply */
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| 		tmo = usec * CFG_HZ;
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| 		tmo /= (1000*1000);
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| 	}
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| 
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| 	reset_timer_masked ();	/* set "advancing" timestamp to 0, set lastdec vaule */
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| 
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| 	while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
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| 		/*NOP*/;
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| }
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| 
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| /*
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|  * This function is derived from PowerPC code (read timebase as long long).
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|  * On ARM it just returns the timer value.
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|  */
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| unsigned long long get_ticks(void)
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| {
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| 	return get_timer(0);
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| }
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| 
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| /*
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|  * This function is derived from PowerPC code (timebase clock frequency).
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|  * On ARM it returns the number of timer ticks per second.
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|  */
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| ulong get_tbclk (void)
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| {
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| 	ulong tbclk;
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| 
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| 	tbclk = CFG_HZ;
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| 	return tbclk;
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| }
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