141 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			141 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C
		
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright (C) 2013 Atmel Corporation
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|  *		      Bo Shen <voice.shen@atmel.com>
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|  */
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| 
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| #include <common.h>
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| #include <hang.h>
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| #include <init.h>
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| #include <log.h>
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| #include <asm/io.h>
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| #include <asm/arch/at91_common.h>
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| #include <asm/arch/at91_pit.h>
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| #include <asm/arch/at91_pmc.h>
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| #include <asm/arch/at91_rstc.h>
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| #include <asm/arch/at91_wdt.h>
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| #include <asm/arch/clk.h>
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| #include <spl.h>
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| 
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| static void switch_to_main_crystal_osc(void)
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| {
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| 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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| 	u32 tmp;
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| 
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| 	tmp = readl(&pmc->mor);
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| 	tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
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| 	tmp &= ~AT91_PMC_MOR_KEY(0xff);
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| 	tmp |= AT91_PMC_MOR_MOSCEN;
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| 	tmp |= AT91_PMC_MOR_OSCOUNT(8);
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| 	tmp |= AT91_PMC_MOR_KEY(0x37);
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| 	writel(tmp, &pmc->mor);
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| 	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
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| 		;
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| 
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| #if defined(CONFIG_SAMA5D2)
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| 	/* Enable a measurement of the external oscillator */
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| 	tmp = readl(&pmc->mcfr);
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| 	tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;
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| 	tmp |= AT91_PMC_MCFR_RCMEAS;
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| 	writel(tmp, &pmc->mcfr);
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| 
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| 	while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))
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| 		;
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| 
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| 	if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))
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| 		hang();
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| #endif
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| 
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| 	tmp = readl(&pmc->mor);
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| /*
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|  * some boards have an external oscillator with driving.
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|  * in this case we need to disable the internal SoC driving (bypass mode)
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|  */
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| #if defined(CONFIG_SPL_AT91_MCK_BYPASS)
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| 	tmp |= AT91_PMC_MOR_OSCBYPASS;
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| #else
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| 	tmp &= ~AT91_PMC_MOR_OSCBYPASS;
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| #endif
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| 	tmp &= ~AT91_PMC_MOR_KEY(0xff);
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| 	tmp |= AT91_PMC_MOR_KEY(0x37);
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| 	writel(tmp, &pmc->mor);
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| 
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| 	tmp = readl(&pmc->mor);
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| 	tmp |= AT91_PMC_MOR_MOSCSEL;
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| 	tmp &= ~AT91_PMC_MOR_KEY(0xff);
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| 	tmp |= AT91_PMC_MOR_KEY(0x37);
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| 	writel(tmp, &pmc->mor);
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| 
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| 	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
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| 		;
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| 
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| #if !defined(CONFIG_SAMA5D2)
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| 	/* Wait until MAINRDY field is set to make sure main clock is stable */
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| 	while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
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| 		;
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| #endif
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| 
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| #if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)
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| 	tmp = readl(&pmc->mor);
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| 	tmp &= ~AT91_PMC_MOR_MOSCRCEN;
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| 	tmp &= ~AT91_PMC_MOR_KEY(0xff);
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| 	tmp |= AT91_PMC_MOR_KEY(0x37);
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| 	writel(tmp, &pmc->mor);
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| #endif
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| }
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| 
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| __weak void matrix_init(void)
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| {
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| 	/* This only be used for sama5d4 soc now */
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| }
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| 
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| __weak void redirect_int_from_saic_to_aic(void)
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| {
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| 	/* This only be used for sama5d4 soc now */
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| }
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| 
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| /* empty stub to satisfy current lowlevel_init, can be removed any time */
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| void s_init(void)
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| {
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| }
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| 
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| void board_init_f(ulong dummy)
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| {
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| 	int ret;
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| 
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| 	switch_to_main_crystal_osc();
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| 
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| #ifdef CONFIG_SAMA5D2
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| 	configure_2nd_sram_as_l2_cache();
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| #endif
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| 
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| #if !defined(CONFIG_WDT_AT91)
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| 	/* disable watchdog */
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| 	at91_disable_wdt();
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| #endif
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| 
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| 	/* PMC configuration */
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| 	at91_pmc_init();
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| 
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| 	at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
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| 
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| 	matrix_init();
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| 
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| 	redirect_int_from_saic_to_aic();
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| 
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| 	timer_init();
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| 
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| 	board_early_init_f();
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| 
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| 	mem_init();
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| 
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| 	ret = spl_init();
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| 	if (ret) {
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| 		debug("spl_init() failed: %d\n", ret);
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| 		hang();
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| 	}
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| 
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| 	preloader_console_init();
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| 
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| }
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