36 lines
		
	
	
		
			715 B
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			36 lines
		
	
	
		
			715 B
		
	
	
	
		
			C
		
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Copyright (c) 2011 The Chromium OS Authors.
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|  */
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| 
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| #ifndef __X86_CACHE_H__
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| #define __X86_CACHE_H__
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| 
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| /*
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|  * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment.  Otherwise
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|  * use 64-bytes, a safe default for x86.
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|  */
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| #ifndef CONFIG_SYS_CACHELINE_SIZE
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| #define CONFIG_SYS_CACHELINE_SIZE	64
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| #endif
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| 
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| #define ARCH_DMA_MINALIGN		CONFIG_SYS_CACHELINE_SIZE
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| 
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| static inline void wbinvd(void)
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| {
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| 	asm volatile ("wbinvd" : : : "memory");
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| }
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| 
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| static inline void invd(void)
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| {
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| 	asm volatile("invd" : : : "memory");
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| }
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| 
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| /* Enable caches and write buffer */
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| void enable_caches(void);
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| 
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| /* Disable caches and write buffer */
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| void disable_caches(void);
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| 
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| #endif /* __X86_CACHE_H__ */
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