125 lines
2.7 KiB
Plaintext
125 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
|
|
/*
|
|
* Copyright 2016 Toradex AG
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include "imx7d.dtsi"
|
|
|
|
/ {
|
|
model = "Toradex Colibri iMX7S/D";
|
|
compatible = "toradex,imx7-colibri", "fsl,imx7";
|
|
|
|
chosen {
|
|
stdout-path = &uart1;
|
|
};
|
|
};
|
|
|
|
&gpmi {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
fsl,use-minimum-ecc;
|
|
nand-on-flash-bbt;
|
|
nand-ecc-mode = "hw";
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-names = "default", "gpio";
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
pinctrl-1 = <&pinctrl_i2c1_gpio>;
|
|
sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
|
|
scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
|
|
rn5t567@33 {
|
|
compatible = "ricoh,rn5t567";
|
|
reg = <0x33>;
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
pinctrl-names = "default", "gpio";
|
|
pinctrl-0 = <&pinctrl_i2c4>;
|
|
pinctrl-1 = <&pinctrl_i2c4_gpio>;
|
|
sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
|
|
scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
|
|
uart-has-rtscts;
|
|
fsl,dte-mode;
|
|
status = "okay";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_gpmi_nand: gpmi-nand-grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD3_CLK__NAND_CLE 0x71
|
|
MX7D_PAD_SD3_CMD__NAND_ALE 0x71
|
|
MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
|
|
MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
|
|
MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
|
|
MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
|
|
MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71
|
|
MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71
|
|
MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71
|
|
MX7D_PAD_SD3_DATA3__NAND_DATA03 0x71
|
|
MX7D_PAD_SD3_DATA4__NAND_DATA04 0x71
|
|
MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71
|
|
MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71
|
|
MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c4: i2c4-grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f
|
|
MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c4_gpio: i2c4-gpio-grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f
|
|
MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1-grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79
|
|
MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79
|
|
MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79
|
|
MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */
|
|
MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&iomuxc_lpsr {
|
|
pinctrl_i2c1: i2c1-grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
|
|
MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1_gpio: i2c1-gpio-grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f
|
|
MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x4000007f
|
|
>;
|
|
};
|
|
};
|