45 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			45 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Copyright 2017 Google, Inc
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|  */
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| 
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| #ifndef _ABI_MACH_ASPEED_AST2500_RESET_H_
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| #define _ABI_MACH_ASPEED_AST2500_RESET_H_
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| 
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| /*
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|  * The values are intentionally layed out as flags in
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|  * WDT reset parameter.
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|  */
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| 
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| #define AST_RESET_SOC			0
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| #define AST_RESET_CHIP			1
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| #define AST_RESET_CPU			(1 << 1)
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| #define AST_RESET_ARM			(1 << 2)
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| #define AST_RESET_COPROC		(1 << 3)
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| #define AST_RESET_SDRAM			(1 << 4)
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| #define AST_RESET_AHB			(1 << 5)
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| #define AST_RESET_I2C			(1 << 6)
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| #define AST_RESET_MAC1			(1 << 7)
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| #define AST_RESET_MAC2			(1 << 8)
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| #define AST_RESET_GCRT			(1 << 9)
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| #define AST_RESET_USB20			(1 << 10)
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| #define AST_RESET_USB11_HOST		(1 << 11)
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| #define AST_RESET_USB11_HID		(1 << 12)
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| #define AST_RESET_VIDEO			(1 << 13)
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| #define AST_RESET_HAC			(1 << 14)
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| #define AST_RESET_LPC			(1 << 15)
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| #define AST_RESET_SDIO			(1 << 16)
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| #define AST_RESET_MIC			(1 << 17)
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| #define AST_RESET_CRT2D			(1 << 18)
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| #define AST_RESET_PWM			(1 << 19)
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| #define AST_RESET_PECI			(1 << 20)
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| #define AST_RESET_JTAG			(1 << 21)
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| #define AST_RESET_ADC			(1 << 22)
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| #define AST_RESET_GPIO			(1 << 23)
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| #define AST_RESET_MCTP			(1 << 24)
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| #define AST_RESET_XDMA			(1 << 25)
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| #define AST_RESET_SPI			(1 << 26)
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| #define AST_RESET_MISC			(1 << 27)
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| 
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| #endif  /* _ABI_MACH_ASPEED_AST2500_RESET_H_ */
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