146 lines
3.5 KiB
C
146 lines
3.5 KiB
C
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Roy Zang <tie-fei.zang@freescale.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* MAXFRM - maximum frame length */
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#define MAXFRM_MASK 0x0000ffff
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#include <common.h>
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#include <phy.h>
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#include <asm/types.h>
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#include <asm/io.h>
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#include <fsl_memac.h>
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#include "fm.h"
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static void memac_init_mac(struct fsl_enet_mac *mac)
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{
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struct memac *regs = mac->base;
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/* mask all interrupt */
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out_be32(®s->imask, IMASK_MASK_ALL);
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/* clear all events */
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out_be32(®s->ievent, IEVENT_CLEAR_ALL);
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/* set the max receive length */
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out_be32(®s->maxfrm, mac->max_rx_len & MAXFRM_MASK);
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/* multicast frame reception for the hash entry disable */
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out_be32(®s->hashtable_ctrl, 0);
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}
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static void memac_enable_mac(struct fsl_enet_mac *mac)
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{
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struct memac *regs = mac->base;
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setbits_be32(®s->command_config,
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MEMAC_CMD_CFG_RXTX_EN | MEMAC_CMD_CFG_NO_LEN_CHK);
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}
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static void memac_disable_mac(struct fsl_enet_mac *mac)
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{
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struct memac *regs = mac->base;
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clrbits_be32(®s->command_config, MEMAC_CMD_CFG_RXTX_EN);
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}
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static void memac_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
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{
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struct memac *regs = mac->base;
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u32 mac_addr0, mac_addr1;
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/*
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* if a station address of 0x12345678ABCD, perform a write to
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* MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
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*/
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mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
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(mac_addr[1] << 8) | (mac_addr[0]);
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out_be32(®s->mac_addr_0, mac_addr0);
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mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
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out_be32(®s->mac_addr_1, mac_addr1);
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}
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static void memac_set_interface_mode(struct fsl_enet_mac *mac,
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phy_interface_t type, int speed)
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{
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/* Roy need more work here */
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struct memac *regs = mac->base;
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u32 if_mode, if_status;
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/* clear all bits relative with interface mode */
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if_mode = in_be32(®s->if_mode);
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if_status = in_be32(®s->if_status);
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/* set interface mode */
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switch (type) {
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case PHY_INTERFACE_MODE_GMII:
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if_mode &= ~IF_MODE_MASK;
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if_mode |= IF_MODE_GMII;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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if_mode |= (IF_MODE_GMII | IF_MODE_RG);
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break;
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case PHY_INTERFACE_MODE_RMII:
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if_mode |= (IF_MODE_GMII | IF_MODE_RM);
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break;
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_SGMII_2500:
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case PHY_INTERFACE_MODE_QSGMII:
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if_mode &= ~IF_MODE_MASK;
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if_mode |= (IF_MODE_GMII);
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break;
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case PHY_INTERFACE_MODE_XGMII:
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if_mode &= ~IF_MODE_MASK;
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if_mode |= IF_MODE_XGMII;
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break;
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default:
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break;
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}
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/* Enable automatic speed selection for Non-XGMII */
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if (type != PHY_INTERFACE_MODE_XGMII)
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if_mode |= IF_MODE_EN_AUTO;
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if (type == PHY_INTERFACE_MODE_RGMII ||
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type == PHY_INTERFACE_MODE_RGMII_TXID) {
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if_mode &= ~IF_MODE_EN_AUTO;
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if_mode &= ~IF_MODE_SETSP_MASK;
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switch (speed) {
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case SPEED_1000:
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if_mode |= IF_MODE_SETSP_1000M;
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break;
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case SPEED_100:
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if_mode |= IF_MODE_SETSP_100M;
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break;
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case SPEED_10:
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if_mode |= IF_MODE_SETSP_10M;
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default:
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break;
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}
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}
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debug(" %s, if_mode = %x\n", __func__, if_mode);
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debug(" %s, if_status = %x\n", __func__, if_status);
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out_be32(®s->if_mode, if_mode);
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return;
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}
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void init_memac(struct fsl_enet_mac *mac, void *base,
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void *phyregs, int max_rx_len)
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{
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mac->base = base;
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mac->phyregs = phyregs;
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mac->max_rx_len = max_rx_len;
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mac->init_mac = memac_init_mac;
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mac->enable_mac = memac_enable_mac;
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mac->disable_mac = memac_disable_mac;
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mac->set_mac_addr = memac_set_mac_addr;
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mac->set_if_mode = memac_set_interface_mode;
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}
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