Remove busy looping during watchdog reset.
Each polling of W_PEND_WTGR bit ("finish posted
write") after watchdog reset takes 120-140us
on BeagleBone Black board. Current U-Boot code
has watchdog resets in random places and often
there is situation when watchdog is reset
few times in a row in nested functions.
This adds extra delays and slows the whole system.
Instead of polling W_PEND_WTGR bit, we skip
watchdog reset if the bit is set. Anyway, watchdog
is in the middle of reset *right now*, so we can
just return.
This noticeably increases performance of the
system. Below are some measurements on BBB:
- DFU upload over USB 15% faster
- fastboot image upload 3x times faster
- USB ep0 transfers with 4k packets 20% faster
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@gmail.com>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
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|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| ast_wdt.c | ||
| at91sam9_wdt.c | ||
| bcm2835_wdt.c | ||
| bcm6345_wdt.c | ||
| designware_wdt.c | ||
| ftwdt010_wdt.c | ||
| imx_watchdog.c | ||
| omap_wdt.c | ||
| orion_wdt.c | ||
| s5p_wdt.c | ||
| sandbox_wdt.c | ||
| tangier_wdt.c | ||
| ulp_wdog.c | ||
| wdt-uclass.c | ||
| xilinx_tb_wdt.c | ||