74 lines
3.0 KiB
ReStructuredText
74 lines
3.0 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+
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.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
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Coreboot
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========
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Build Instructions for U-Boot as coreboot payload
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-------------------------------------------------
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Building U-Boot as a coreboot payload is just like building U-Boot for targets
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on other architectures, like below::
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$ make coreboot_defconfig
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$ make all
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Test with coreboot
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------------------
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For testing U-Boot as the coreboot payload, there are things that need be paid
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attention to. coreboot supports loading an ELF executable and a 32-bit plain
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binary, as well as other supported payloads. With the default configuration,
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U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
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generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
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provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
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this capability yet. The command is as follows::
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# in the coreboot root directory
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$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
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-f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
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Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
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of _x86boot_start (in arch/x86/cpu/start.S).
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If you want to use ELF as the coreboot payload, change U-Boot configuration to
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use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
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To enable video you must enable these options in coreboot:
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- Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
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- Keep VESA framebuffer
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At present it seems that for Minnowboard Max, coreboot does not pass through
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the video information correctly (it always says the resolution is 0x0). This
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works correctly for link though.
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64-bit U-Boot
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-------------
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In addition to the 32-bit 'coreboot' build there is a 'coreboot64' build. This
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produces an image which can be booted from coreboot (32-bit). Internally it
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works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It
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can be useful for running UEFI applications, for example.
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This has only been lightly tested.
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Memory map
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----------
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========== ==================================================================
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Address Region at that address
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========== ==================================================================
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ffffffff Top of ROM (and last byte of 32-bit address space)
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7a9fd000 Typical top of memory available to U-Boot
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(use cbsysinfo to see where memory range 'table' starts)
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10000000 Memory reserved by coreboot for mapping PCI devices
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(typical size 2151000, includes framebuffer)
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1920000 CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup
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1110000 CONFIG_SYS_TEXT_BASE (start address of U-Boot code, before reloc)
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110000 CONFIG_BLOBLIST_ADDR (before being relocated)
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100000 CONFIG_PRE_CON_BUF_ADDR
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f0000 ACPI tables set up by U-Boot
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(typically redirects to 7ab10030 or similar)
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500 Location of coreboot sysinfo table, used during startup
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========== ==================================================================
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