79 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			79 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * (C) Copyright 2010
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 * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
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 */
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/*
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 * Date & Time support for the internal Real-time Timer
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 * of AT91SAM9260 and compatibles.
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 * Compatible with the LinuX rtc driver workaround:
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 * The RTT cannot be written to, but only reset.
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 * The actual time is the sum of RTT and one of
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 * the four GPBR registers.
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 *
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 * The at91sam9260 has 4 GPBR (0-3).
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 * For their typical use see at91_gpbr.h !
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 *
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 * make sure u-boot and kernel use the same GPBR !
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 */
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <asm/io.h>
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#include <linux/errno.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/at91_rtt.h>
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#include <asm/arch/at91_gpbr.h>
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int rtc_get (struct rtc_time *tmp)
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{
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	at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
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	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
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	ulong tim;
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	ulong tim2;
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	ulong off;
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	do {
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		tim = readl(&rtt->vr);
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		tim2 = readl(&rtt->vr);
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	} while (tim!=tim2);
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	off = readl(&gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
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	/* off==0 means time is invalid, but we ignore that */
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	rtc_to_tm(tim+off, tmp);
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	return 0;
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}
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int rtc_set (struct rtc_time *tmp)
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{
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	at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
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	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
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	ulong tim;
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	tim = rtc_mktime(tmp);
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	/* clear alarm, set prescaler to 32768, clear counter */
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	writel(32768+AT91_RTT_RTTRST, &rtt->mr);
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	writel(~0, &rtt->ar);
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	writel(tim, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
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	/* wait for counter clear to happen, takes less than a 1/32768th second */
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	while (readl(&rtt->vr) != 0)
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		;
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	return 0;
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}
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void rtc_reset (void)
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{
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	at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
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	at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
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	/* clear alarm, set prescaler to 32768, clear counter */
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	writel(32768+AT91_RTT_RTTRST, &rtt->mr);
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	writel(~0, &rtt->ar);
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	writel(0, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
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	/* wait for counter clear to happen, takes less than a 1/32768th second */
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	while (readl(&rtt->vr) != 0)
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		;
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}
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