62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*/
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#ifndef _GPI_H_
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#define _GPI_H_
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#define GPI_VERSION 0x00
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#define GPI_CTRL 0x04
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#define GPI_RX_CONFIG 0x08
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#define GPI_HDR_SIZE 0x0c
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#define GPI_BUF_SIZE 0x10
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#define GPI_LMEM_ALLOC_ADDR 0x14
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#define GPI_LMEM_FREE_ADDR 0x18
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#define GPI_DDR_ALLOC_ADDR 0x1c
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#define GPI_DDR_FREE_ADDR 0x20
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#define GPI_CLASS_ADDR 0x24
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#define GPI_DRX_FIFO 0x28
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#define GPI_TRX_FIFO 0x2c
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#define GPI_INQ_PKTPTR 0x30
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#define GPI_DDR_DATA_OFFSET 0x34
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#define GPI_LMEM_DATA_OFFSET 0x38
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#define GPI_TMLF_TX 0x4c
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#define GPI_DTX_ASEQ 0x50
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#define GPI_FIFO_STATUS 0x54
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#define GPI_FIFO_DEBUG 0x58
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#define GPI_TX_PAUSE_TIME 0x5c
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#define GPI_LMEM_SEC_BUF_DATA_OFFSET 0x60
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#define GPI_DDR_SEC_BUF_DATA_OFFSET 0x64
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#define GPI_TOE_CHKSUM_EN 0x68
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#define GPI_OVERRUN_DROPCNT 0x6c
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#define GPI_AXI_CTRL 0x70
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struct gpi_cfg {
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u32 lmem_rtry_cnt;
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u32 tmlf_txthres;
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u32 aseq_len;
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};
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/* GPI commons defines */
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#define GPI_LMEM_BUF_EN 0x1
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#define GPI_DDR_BUF_EN 0x1
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/* EGPI 1 defines */
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#define EGPI1_LMEM_RTRY_CNT 0x40
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#define EGPI1_TMLF_TXTHRES 0xBC
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#define EGPI1_ASEQ_LEN 0x50
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/* EGPI 2 defines */
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#define EGPI2_LMEM_RTRY_CNT 0x40
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#define EGPI2_TMLF_TXTHRES 0xBC
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#define EGPI2_ASEQ_LEN 0x40
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/* HGPI defines */
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#define HGPI_LMEM_RTRY_CNT 0x40
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#define HGPI_TMLF_TXTHRES 0xBC
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#define HGPI_ASEQ_LEN 0x40
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#endif /* _GPI_H_ */
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