264 lines
6.9 KiB
ArmAsm
264 lines
6.9 KiB
ArmAsm
/*
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* U-Boot - start.S Startup file for Blackfin U-Boot
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*
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* Copyright (c) 2005-2008 Analog Devices Inc.
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*
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* This file is based on head.S
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* Copyright (c) 2003 Metrowerks/Motorola
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* Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
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* Kenneth Albanowski <kjahds@kjahds.com>,
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* The Silver Hammer Group, Ltd.
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* (c) 1995, Dionne & Associates
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* (c) 1995, DKG Display Tech.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <asm/blackfin.h>
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#include <asm/mach-common/bits/watchdog.h>
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#include <asm/mach-common/bits/core.h>
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#include <asm/mach-common/bits/pll.h>
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#include <asm/serial.h>
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/* It may seem odd that we make calls to functions even though we haven't
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* relocated ourselves yet out of {flash,ram,wherever}. This is OK because
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* the "call" instruction in the Blackfin architecture is actually PC
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* relative. So we can call functions all we want and not worry about them
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* not being relocated yet.
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*/
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.text
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ENTRY(_start)
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/* Set our initial stack to L1 scratch space */
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sp.l = LO(L1_SRAM_SCRATCH_END - 20);
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sp.h = HI(L1_SRAM_SCRATCH_END - 20);
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/* Optimization register tricks: keep a base value in the
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* reserved P registers so we use the load/store with an
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* offset syntax. R0 = [P5 + <constant>];
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* P4 - system MMR base
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* P5 - core MMR base
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*/
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#ifdef CONFIG_HW_WATCHDOG
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p4.l = 0;
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p4.h = HI(SYSMMR_BASE);
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#endif
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p5.l = 0;
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p5.h = HI(COREMMR_BASE);
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#ifdef CONFIG_HW_WATCHDOG
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/* Program the watchdog with default timeout of ~5 seconds.
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* That should be long enough to bootstrap ourselves up and
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* then the common U-Boot code can take over.
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*/
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r1 = WDDIS;
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# ifdef __ADSPBF60x__
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[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
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# else
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W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
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# endif
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SSYNC;
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r0 = 0;
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r0.h = HI(MSEC_TO_SCLK(CONFIG_WATCHDOG_TIMEOUT_MSECS));
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[p4 + (WDOG_CNT - SYSMMR_BASE)] = r0;
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SSYNC;
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r1 = WDEN;
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/* fire up the watchdog - R0.L above needs to be 0x0000 */
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# ifdef __ADSPBF60x__
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[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
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# else
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W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
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# endif
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SSYNC;
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#endif
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/* Turn on the serial for debugging the init process */
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serial_early_init
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serial_early_set_baud
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serial_early_puts("Init Registers");
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/* Disable self-nested interrupts and enable CYCLES for udelay() */
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R0 = CCEN | 0x30;
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SYSCFG = R0;
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/* Zero out registers required by Blackfin ABI.
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* http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
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*/
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r1 = 0 (x);
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/* Disable circular buffers */
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l0 = r1;
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l1 = r1;
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l2 = r1;
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l3 = r1;
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/* Disable hardware loops in case we were started by 'go' */
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lc0 = r1;
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lc1 = r1;
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/* Save RETX so we can pass it while booting Linux */
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r7 = RETX;
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#if CONFIG_MEM_SIZE
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/* Figure out where we are currently executing so that we can decide
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* how to best reprogram and relocate things. We'll pass below:
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* R4: load address of _start
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* R5: current (not load) address of _start
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*/
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serial_early_puts("Find ourselves");
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call _get_pc;
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.Loffset:
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r1.l = .Loffset;
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r1.h = .Loffset;
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r4.l = _start;
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r4.h = _start;
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r3 = r1 - r4;
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r5 = r0 - r3;
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/* Inform upper layers if we had to do the relocation ourselves.
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* This allows us to detect whether we were loaded by 'go 0x1000'
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* or by the bootrom from an LDR. "R6" is "loaded_from_ldr".
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*/
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r6 = 1 (x);
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cc = r4 == r5;
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if cc jump .Lnorelocate;
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r6 = 0 (x);
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/* Turn off caches as they require CPLBs and a CPLB miss requires
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* a software exception handler to process it. But we're about to
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* clobber any previous executing software (like U-Boot that just
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* launched a new U-Boot via 'go'), so any handler state will be
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* unreliable after the memcpy below.
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*/
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serial_early_puts("Kill Caches");
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r0 = 0;
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[p5 + (IMEM_CONTROL - COREMMR_BASE)] = r0;
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[p5 + (DMEM_CONTROL - COREMMR_BASE)] = r0;
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ssync;
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/* In bypass mode, we don't have an LDR with an init block
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* so we need to explicitly call it ourselves. This will
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* reprogram our clocks, memory, and setup our async banks.
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*/
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serial_early_puts("Program Clocks");
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/* if we're executing >=0x20000000, then we dont need to dma */
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r3 = 0x0;
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r3.h = 0x2000;
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cc = r5 < r3 (iu);
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if cc jump .Ldma_and_reprogram;
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#else
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r6 = 1 (x); /* fake loaded_from_ldr = 1 */
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#endif
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r0 = 0 (x); /* set bootstruct to NULL */
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call _initcode;
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jump .Lprogrammed;
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/* we're sitting in external memory, so dma into L1 and reprogram */
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.Ldma_and_reprogram:
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r0.l = LO(L1_INST_SRAM);
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r0.h = HI(L1_INST_SRAM);
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r1.l = __initcode_lma;
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r1.h = __initcode_lma;
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r2.l = __initcode_len;
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r2.h = __initcode_len;
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r1 = r1 - r4; /* convert r1 from load address of initcode ... */
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r1 = r1 + r5; /* ... to current (not load) address of initcode */
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p3 = r0;
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call _dma_memcpy_nocache;
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r0 = 0 (x); /* set bootstruct to NULL */
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call (p3);
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/* Since we reprogrammed SCLK, we need to update the serial divisor */
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.Lprogrammed:
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serial_early_set_baud
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#if CONFIG_MEM_SIZE
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/* Relocate from wherever we are (FLASH/RAM/etc...) to the hardcoded
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* monitor location in the end of RAM. We know that memcpy() only
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* uses registers, so it is safe to call here. Note that this only
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* copies to external memory ... we do not start executing out of
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* it yet (see "lower to 15" below).
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*/
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serial_early_puts("Relocate");
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r0 = r4;
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r1 = r5;
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r2.l = LO(CONFIG_SYS_MONITOR_LEN);
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r2.h = HI(CONFIG_SYS_MONITOR_LEN);
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call _memcpy_ASM;
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#endif
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.Lnorelocate:
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/* Initialize BSS section ... we know that memset() does not
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* use the BSS, so it is safe to call here. The bootrom LDR
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* takes care of clearing things for us.
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*/
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serial_early_puts("Zero BSS");
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r0.l = __bss_start;
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r0.h = __bss_start;
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r1 = 0 (x);
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r2.l = __bss_len;
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r2.h = __bss_len;
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call _memset;
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/* Setup the actual stack in external memory */
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sp.h = HI(CONFIG_STACKBASE);
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sp.l = LO(CONFIG_STACKBASE);
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fp = sp;
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/* Now lower ourselves from the highest interrupt level to
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* the lowest. We do this by masking all interrupts but 15,
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* setting the 15 handler to ".Lenable_nested", raising the 15
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* interrupt, and then returning from the highest interrupt
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* level to the dummy "jump" until the interrupt controller
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* services the pending 15 interrupt. If executing out of
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* flash, these steps also changes the code flow from flash
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* to external memory.
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*/
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serial_early_puts("Lower to 15");
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r0 = r7;
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r1 = r6;
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p1.l = .Lenable_nested;
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p1.h = .Lenable_nested;
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[p5 + (EVT15 - COREMMR_BASE)] = p1;
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r7 = EVT_IVG15 (z);
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sti r7;
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raise 15;
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p3.l = .LWAIT_HERE;
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p3.h = .LWAIT_HERE;
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reti = p3;
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rti;
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/* Enable nested interrupts before continuing with cpu init */
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.Lenable_nested:
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cli r7;
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[--sp] = reti;
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jump.l _cpu_init_f;
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.LWAIT_HERE:
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jump .LWAIT_HERE;
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ENDPROC(_start)
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LENTRY(_get_pc)
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r0 = rets;
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#if ANOMALY_05000371
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NOP;
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NOP;
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NOP;
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#endif
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rts;
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ENDPROC(_get_pc)
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ENTRY(_relocate_code)
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/* Fake relocate code. Setup the new stack only */
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sp = r0;
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fp = sp;
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r0 = p3;
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r1.h = 0x2000;
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r1.l = 0x10;
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jump.l _board_init_r
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ENDPROC(_relocate_code)
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