365 lines
6.8 KiB
C
365 lines
6.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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*/
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#ifndef _COREBOOT_TABLES_H
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#define _COREBOOT_TABLES_H
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struct memory_area;
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struct cbuint64 {
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u32 lo;
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u32 hi;
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};
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struct cb_header {
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u8 signature[4];
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u32 header_bytes;
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u32 header_checksum;
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u32 table_bytes;
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u32 table_checksum;
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u32 table_entries;
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};
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struct cb_record {
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u32 tag;
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u32 size;
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};
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#define CB_TAG_UNUSED 0x0000
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#define CB_TAG_MEMORY 0x0001
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struct cb_memory_range {
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struct cbuint64 start;
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struct cbuint64 size;
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u32 type;
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};
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#define CB_MEM_RAM 1
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#define CB_MEM_RESERVED 2
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#define CB_MEM_ACPI 3
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#define CB_MEM_NVS 4
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#define CB_MEM_UNUSABLE 5
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#define CB_MEM_VENDOR_RSVD 6
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#define CB_MEM_TABLE 16
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struct cb_memory {
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u32 tag;
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u32 size;
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struct cb_memory_range map[0];
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};
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#define CB_TAG_HWRPB 0x0002
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struct cb_hwrpb {
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u32 tag;
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u32 size;
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u64 hwrpb;
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};
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#define CB_TAG_MAINBOARD 0x0003
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struct cb_mainboard {
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u32 tag;
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u32 size;
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u8 vendor_idx;
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u8 part_number_idx;
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u8 strings[0];
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};
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#define CB_TAG_VERSION 0x0004
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#define CB_TAG_EXTRA_VERSION 0x0005
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#define CB_TAG_BUILD 0x0006
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#define CB_TAG_COMPILE_TIME 0x0007
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#define CB_TAG_COMPILE_BY 0x0008
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#define CB_TAG_COMPILE_HOST 0x0009
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#define CB_TAG_COMPILE_DOMAIN 0x000a
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#define CB_TAG_COMPILER 0x000b
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#define CB_TAG_LINKER 0x000c
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#define CB_TAG_ASSEMBLER 0x000d
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struct cb_string {
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u32 tag;
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u32 size;
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u8 string[0];
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};
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#define CB_TAG_SERIAL 0x000f
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struct cb_serial {
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u32 tag;
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u32 size;
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#define CB_SERIAL_TYPE_IO_MAPPED 1
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#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
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u32 type;
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u32 baseaddr;
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u32 baud;
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u32 regwidth;
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/*
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* Crystal or input frequency to the chip containing the UART.
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* Provide the board specific details to allow the payload to
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* initialize the chip containing the UART and make independent
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* decisions as to which dividers to select and their values
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* to eventually arrive at the desired console baud-rate.
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*/
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u32 input_hertz;
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/*
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* UART PCI address: bus, device, function
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* 1 << 31 - Valid bit, PCI UART in use
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* Bus << 20
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* Device << 15
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* Function << 12
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*/
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u32 uart_pci_addr;
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};
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#define CB_TAG_CONSOLE 0x0010
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struct cb_console {
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u32 tag;
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u32 size;
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u16 type;
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};
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#define CB_TAG_CONSOLE_SERIAL8250 0
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#define CB_TAG_CONSOLE_VGA 1 /* OBSOLETE */
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#define CB_TAG_CONSOLE_BTEXT 2 /* OBSOLETE */
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#define CB_TAG_CONSOLE_LOGBUF 3
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#define CB_TAG_CONSOLE_SROM 4 /* OBSOLETE */
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#define CB_TAG_CONSOLE_EHCI 5
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#define CB_TAG_FORWARD 0x0011
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struct cb_forward {
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u32 tag;
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u32 size;
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u64 forward;
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};
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#define CB_TAG_FRAMEBUFFER 0x0012
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struct cb_framebuffer {
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u32 tag;
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u32 size;
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u64 physical_address;
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u32 x_resolution;
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u32 y_resolution;
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u32 bytes_per_line;
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u8 bits_per_pixel;
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u8 red_mask_pos;
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u8 red_mask_size;
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u8 green_mask_pos;
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u8 green_mask_size;
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u8 blue_mask_pos;
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u8 blue_mask_size;
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u8 reserved_mask_pos;
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u8 reserved_mask_size;
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};
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#define CB_TAG_GPIO 0x0013
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#define GPIO_MAX_NAME_LENGTH 16
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struct cb_gpio {
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u32 port;
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u32 polarity;
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u32 value;
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u8 name[GPIO_MAX_NAME_LENGTH];
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};
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struct cb_gpios {
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u32 tag;
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u32 size;
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u32 count;
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struct cb_gpio gpios[0];
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};
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#define CB_TAG_FDT 0x0014
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struct cb_fdt {
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uint32_t tag;
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uint32_t size; /* size of the entire entry */
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/* the actual FDT gets placed here */
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};
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#define CB_TAG_VDAT 0x0015
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struct cb_vdat {
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uint32_t tag;
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uint32_t size; /* size of the entire entry */
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void *vdat_addr;
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uint32_t vdat_size;
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};
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#define CB_TAG_TIMESTAMPS 0x0016
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#define CB_TAG_CBMEM_CONSOLE 0x0017
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#define CB_TAG_MRC_CACHE 0x0018
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struct cb_cbmem_tab {
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uint32_t tag;
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uint32_t size;
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void *cbmem_tab;
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};
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#define CB_TAG_VBNV 0x0019
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struct cb_vbnv {
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uint32_t tag;
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uint32_t size;
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uint32_t vbnv_start;
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uint32_t vbnv_size;
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};
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#define CB_TAG_CBMEM_ENTRY 0x0031
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#define CBMEM_ID_SMBIOS 0x534d4254
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struct cb_cbmem_entry {
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uint32_t tag;
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uint32_t size;
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uint64_t address;
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uint32_t entry_size;
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uint32_t id;
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};
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#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
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struct cb_cmos_option_table {
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u32 tag;
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u32 size;
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u32 header_length;
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};
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#define CB_TAG_OPTION 0x00c9
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#define CMOS_MAX_NAME_LENGTH 32
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struct cb_cmos_entries {
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u32 tag;
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u32 size;
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u32 bit;
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u32 length;
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u32 config;
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u32 config_id;
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u8 name[CMOS_MAX_NAME_LENGTH];
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};
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#define CB_TAG_OPTION_ENUM 0x00ca
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#define CMOS_MAX_TEXT_LENGTH 32
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struct cb_cmos_enums {
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u32 tag;
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u32 size;
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u32 config_id;
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u32 value;
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u8 text[CMOS_MAX_TEXT_LENGTH];
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};
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#define CB_TAG_OPTION_DEFAULTS 0x00cb
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#define CMOS_IMAGE_BUFFER_SIZE 128
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struct cb_cmos_defaults {
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u32 tag;
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u32 size;
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u32 name_length;
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u8 name[CMOS_MAX_NAME_LENGTH];
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u8 default_set[CMOS_IMAGE_BUFFER_SIZE];
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};
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#define CB_TAG_OPTION_CHECKSUM 0x00cc
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#define CHECKSUM_NONE 0
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#define CHECKSUM_PCBIOS 1
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struct cb_cmos_checksum {
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u32 tag;
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u32 size;
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u32 range_start;
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u32 range_end;
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u32 location;
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u32 type;
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};
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/* Helpful macros */
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#define MEM_RANGE_COUNT(_rec) \
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(((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))
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#define MEM_RANGE_PTR(_rec, _idx) \
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(((u8 *) (_rec)) + sizeof(*(_rec)) \
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+ (sizeof((_rec)->map[0]) * (_idx)))
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#define MB_VENDOR_STRING(_mb) \
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(((unsigned char *) ((_mb)->strings)) + (_mb)->vendor_idx)
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#define MB_PART_STRING(_mb) \
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(((unsigned char *) ((_mb)->strings)) + (_mb)->part_number_idx)
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#define UNPACK_CB64(_in) \
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((((u64) _in.hi) << 32) | _in.lo)
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#define CBMEM_TOC_RESERVED 512
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#define MAX_CBMEM_ENTRIES 16
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#define CBMEM_MAGIC 0x434f5245
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struct cbmem_entry {
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u32 magic;
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u32 id;
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u64 base;
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u64 size;
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} __packed;
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#define CBMEM_ID_FREESPACE 0x46524545
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#define CBMEM_ID_GDT 0x4c474454
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#define CBMEM_ID_ACPI 0x41435049
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#define CBMEM_ID_CBTABLE 0x43425442
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#define CBMEM_ID_PIRQ 0x49525154
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#define CBMEM_ID_MPTABLE 0x534d5054
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#define CBMEM_ID_RESUME 0x5245534d
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#define CBMEM_ID_RESUME_SCRATCH 0x52455343
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#define CBMEM_ID_SMBIOS 0x534d4254
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#define CBMEM_ID_TIMESTAMP 0x54494d45
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#define CBMEM_ID_MRCDATA 0x4d524344
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#define CBMEM_ID_CONSOLE 0x434f4e53
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#define CBMEM_ID_NONE 0x00000000
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/**
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* high_table_reserve() - reserve configuration table in high memory
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*
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* This reserves configuration table in high memory.
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*
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* @return: always 0
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*/
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int high_table_reserve(void);
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/**
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* high_table_malloc() - allocate configuration table in high memory
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*
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* This allocates configuration table in high memory.
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*
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* @bytes: size of configuration table to be allocated
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* @return: pointer to configuration table in high memory
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*/
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void *high_table_malloc(size_t bytes);
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/**
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* write_coreboot_table() - write coreboot table
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*
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* This writes coreboot table at a given address.
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*
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* @addr: start address to write coreboot table
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* @cfg_tables: pointer to configuration table memory area
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*/
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void write_coreboot_table(u32 addr, struct memory_area *cfg_tables);
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/**
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* locate_coreboot_table() - Try to find coreboot tables at standard locations
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*
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* @return address of table that was found, or -ve error number
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*/
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long locate_coreboot_table(void);
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#endif
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