476 lines
11 KiB
C
476 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <linux/libfdt.h>
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#include <malloc.h>
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#include <mapmem.h>
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#include <regmap.h>
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#include <asm/io.h>
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#include <dm/of_addr.h>
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#include <linux/ioport.h>
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DECLARE_GLOBAL_DATA_PTR;
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/**
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* regmap_alloc() - Allocate a regmap with a given number of ranges.
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*
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* @count: Number of ranges to be allocated for the regmap.
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* Return: A pointer to the newly allocated regmap, or NULL on error.
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*/
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static struct regmap *regmap_alloc(int count)
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{
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struct regmap *map;
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map = malloc(sizeof(*map) + sizeof(map->ranges[0]) * count);
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if (!map)
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return NULL;
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map->range_count = count;
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return map;
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}
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
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struct regmap **mapp)
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{
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struct regmap_range *range;
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struct regmap *map;
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map = regmap_alloc(count);
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if (!map)
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return -ENOMEM;
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for (range = map->ranges; count > 0; reg += 2, range++, count--) {
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range->start = *reg;
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range->size = reg[1];
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}
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*mapp = map;
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return 0;
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}
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#else
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/**
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* init_range() - Initialize a single range of a regmap
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* @node: Device node that will use the map in question
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* @range: Pointer to a regmap_range structure that will be initialized
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* @addr_len: The length of the addr parts of the reg property
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* @size_len: The length of the size parts of the reg property
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* @index: The index of the range to initialize
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*
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* This function will read the necessary 'reg' information from the device tree
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* (the 'addr' part, and the 'length' part), and initialize the range in
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* quesion.
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*
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* Return: 0 if OK, -ve on error
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*/
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static int init_range(ofnode node, struct regmap_range *range, int addr_len,
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int size_len, int index)
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{
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fdt_size_t sz;
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struct resource r;
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if (of_live_active()) {
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int ret;
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ret = of_address_to_resource(ofnode_to_np(node),
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index, &r);
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if (ret) {
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debug("%s: Could not read resource of range %d (ret = %d)\n",
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ofnode_get_name(node), index, ret);
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return ret;
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}
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range->start = r.start;
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range->size = r.end - r.start + 1;
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} else {
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int offset = ofnode_to_offset(node);
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range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob, offset,
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"reg", index,
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addr_len, size_len,
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&sz, true);
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if (range->start == FDT_ADDR_T_NONE) {
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debug("%s: Could not read start of range %d\n",
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ofnode_get_name(node), index);
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return -EINVAL;
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}
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range->size = sz;
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}
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return 0;
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}
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int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index)
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{
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struct regmap *map;
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int addr_len, size_len;
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int ret;
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addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
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if (addr_len < 0) {
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debug("%s: Error while reading the addr length (ret = %d)\n",
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ofnode_get_name(node), addr_len);
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return addr_len;
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}
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size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
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if (size_len < 0) {
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debug("%s: Error while reading the size length: (ret = %d)\n",
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ofnode_get_name(node), size_len);
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return size_len;
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}
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map = regmap_alloc(1);
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if (!map)
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return -ENOMEM;
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ret = init_range(node, map->ranges, addr_len, size_len, index);
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if (ret)
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goto err;
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if (ofnode_read_bool(node, "little-endian"))
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map->endianness = REGMAP_LITTLE_ENDIAN;
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else if (ofnode_read_bool(node, "big-endian"))
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map->endianness = REGMAP_BIG_ENDIAN;
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else if (ofnode_read_bool(node, "native-endian"))
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map->endianness = REGMAP_NATIVE_ENDIAN;
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else /* Default: native endianness */
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map->endianness = REGMAP_NATIVE_ENDIAN;
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*mapp = map;
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return 0;
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err:
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regmap_uninit(map);
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return ret;
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}
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int regmap_init_mem(ofnode node, struct regmap **mapp)
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{
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struct regmap_range *range;
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struct regmap *map;
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int count;
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int addr_len, size_len, both_len;
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int len;
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int index;
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int ret;
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addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
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if (addr_len < 0) {
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debug("%s: Error while reading the addr length (ret = %d)\n",
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ofnode_get_name(node), addr_len);
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return addr_len;
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}
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size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
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if (size_len < 0) {
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debug("%s: Error while reading the size length: (ret = %d)\n",
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ofnode_get_name(node), size_len);
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return size_len;
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}
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both_len = addr_len + size_len;
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if (!both_len) {
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debug("%s: Both addr and size length are zero\n",
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ofnode_get_name(node));
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return -EINVAL;
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}
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len = ofnode_read_size(node, "reg");
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if (len < 0) {
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debug("%s: Error while reading reg size (ret = %d)\n",
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ofnode_get_name(node), len);
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return len;
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}
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len /= sizeof(fdt32_t);
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count = len / both_len;
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if (!count) {
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debug("%s: Not enough data in reg property\n",
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ofnode_get_name(node));
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return -EINVAL;
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}
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map = regmap_alloc(count);
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if (!map)
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return -ENOMEM;
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for (range = map->ranges, index = 0; count > 0;
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count--, range++, index++) {
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ret = init_range(node, range, addr_len, size_len, index);
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if (ret)
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goto err;
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}
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if (ofnode_read_bool(node, "little-endian"))
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map->endianness = REGMAP_LITTLE_ENDIAN;
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else if (ofnode_read_bool(node, "big-endian"))
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map->endianness = REGMAP_BIG_ENDIAN;
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else if (ofnode_read_bool(node, "native-endian"))
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map->endianness = REGMAP_NATIVE_ENDIAN;
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else /* Default: native endianness */
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map->endianness = REGMAP_NATIVE_ENDIAN;
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*mapp = map;
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return 0;
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err:
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regmap_uninit(map);
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return ret;
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}
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#endif
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void *regmap_get_range(struct regmap *map, unsigned int range_num)
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{
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struct regmap_range *range;
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if (range_num >= map->range_count)
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return NULL;
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range = &map->ranges[range_num];
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return map_sysmem(range->start, range->size);
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}
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int regmap_uninit(struct regmap *map)
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{
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free(map);
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return 0;
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}
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static inline u8 __read_8(u8 *addr, enum regmap_endianness_t endianness)
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{
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return readb(addr);
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}
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static inline u16 __read_16(u16 *addr, enum regmap_endianness_t endianness)
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{
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switch (endianness) {
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case REGMAP_LITTLE_ENDIAN:
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return in_le16(addr);
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case REGMAP_BIG_ENDIAN:
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return in_be16(addr);
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case REGMAP_NATIVE_ENDIAN:
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return readw(addr);
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}
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return readw(addr);
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}
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static inline u32 __read_32(u32 *addr, enum regmap_endianness_t endianness)
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{
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switch (endianness) {
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case REGMAP_LITTLE_ENDIAN:
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return in_le32(addr);
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case REGMAP_BIG_ENDIAN:
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return in_be32(addr);
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case REGMAP_NATIVE_ENDIAN:
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return readl(addr);
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}
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return readl(addr);
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}
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#if defined(in_le64) && defined(in_be64) && defined(readq)
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static inline u64 __read_64(u64 *addr, enum regmap_endianness_t endianness)
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{
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switch (endianness) {
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case REGMAP_LITTLE_ENDIAN:
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return in_le64(addr);
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case REGMAP_BIG_ENDIAN:
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return in_be64(addr);
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case REGMAP_NATIVE_ENDIAN:
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return readq(addr);
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}
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return readq(addr);
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}
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#endif
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int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
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void *valp, size_t val_len)
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{
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struct regmap_range *range;
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void *ptr;
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if (range_num >= map->range_count) {
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debug("%s: range index %d larger than range count\n",
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__func__, range_num);
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return -ERANGE;
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}
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range = &map->ranges[range_num];
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if (offset + val_len > range->size) {
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debug("%s: offset/size combination invalid\n", __func__);
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return -ERANGE;
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}
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ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
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switch (val_len) {
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case REGMAP_SIZE_8:
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*((u8 *)valp) = __read_8(ptr, map->endianness);
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break;
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case REGMAP_SIZE_16:
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*((u16 *)valp) = __read_16(ptr, map->endianness);
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break;
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case REGMAP_SIZE_32:
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*((u32 *)valp) = __read_32(ptr, map->endianness);
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break;
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#if defined(in_le64) && defined(in_be64) && defined(readq)
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case REGMAP_SIZE_64:
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*((u64 *)valp) = __read_64(ptr, map->endianness);
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break;
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#endif
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default:
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debug("%s: regmap size %zu unknown\n", __func__, val_len);
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return -EINVAL;
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}
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return 0;
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}
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int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t val_len)
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{
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return regmap_raw_read_range(map, 0, offset, valp, val_len);
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}
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int regmap_read(struct regmap *map, uint offset, uint *valp)
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{
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return regmap_raw_read(map, offset, valp, REGMAP_SIZE_32);
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}
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static inline void __write_8(u8 *addr, const u8 *val,
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enum regmap_endianness_t endianness)
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{
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writeb(*val, addr);
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}
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static inline void __write_16(u16 *addr, const u16 *val,
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enum regmap_endianness_t endianness)
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{
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switch (endianness) {
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case REGMAP_NATIVE_ENDIAN:
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writew(*val, addr);
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break;
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case REGMAP_LITTLE_ENDIAN:
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out_le16(addr, *val);
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break;
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case REGMAP_BIG_ENDIAN:
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out_be16(addr, *val);
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break;
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}
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}
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static inline void __write_32(u32 *addr, const u32 *val,
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enum regmap_endianness_t endianness)
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{
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switch (endianness) {
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case REGMAP_NATIVE_ENDIAN:
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writel(*val, addr);
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break;
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case REGMAP_LITTLE_ENDIAN:
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out_le32(addr, *val);
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break;
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case REGMAP_BIG_ENDIAN:
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out_be32(addr, *val);
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break;
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}
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}
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#if defined(out_le64) && defined(out_be64) && defined(writeq)
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static inline void __write_64(u64 *addr, const u64 *val,
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enum regmap_endianness_t endianness)
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{
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switch (endianness) {
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case REGMAP_NATIVE_ENDIAN:
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writeq(*val, addr);
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break;
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case REGMAP_LITTLE_ENDIAN:
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out_le64(addr, *val);
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break;
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case REGMAP_BIG_ENDIAN:
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out_be64(addr, *val);
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break;
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}
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}
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#endif
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int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset,
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const void *val, size_t val_len)
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{
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struct regmap_range *range;
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void *ptr;
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if (range_num >= map->range_count) {
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debug("%s: range index %d larger than range count\n",
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__func__, range_num);
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return -ERANGE;
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}
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range = &map->ranges[range_num];
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if (offset + val_len > range->size) {
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debug("%s: offset/size combination invalid\n", __func__);
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return -ERANGE;
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}
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ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
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switch (val_len) {
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case REGMAP_SIZE_8:
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__write_8(ptr, val, map->endianness);
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break;
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case REGMAP_SIZE_16:
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__write_16(ptr, val, map->endianness);
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break;
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case REGMAP_SIZE_32:
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__write_32(ptr, val, map->endianness);
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break;
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#if defined(out_le64) && defined(out_be64) && defined(writeq)
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case REGMAP_SIZE_64:
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__write_64(ptr, val, map->endianness);
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break;
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#endif
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default:
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debug("%s: regmap size %zu unknown\n", __func__, val_len);
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return -EINVAL;
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}
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return 0;
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}
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int regmap_raw_write(struct regmap *map, uint offset, const void *val,
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size_t val_len)
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{
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return regmap_raw_write_range(map, 0, offset, val, val_len);
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}
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int regmap_write(struct regmap *map, uint offset, uint val)
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{
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return regmap_raw_write(map, offset, &val, REGMAP_SIZE_32);
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}
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int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val)
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{
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uint reg;
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int ret;
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ret = regmap_read(map, offset, ®);
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if (ret)
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return ret;
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reg &= ~mask;
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return regmap_write(map, offset, reg | (val & mask));
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}
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